[gem5-users] Re: Making an address range uncacheable RISCV FS.

Hi Deepak, RISC-V PMA is supported in gem5. You can have a look at the source here: https://gem5.googlesource.com/public/gem5/+/refs/heads/develop/src/arch/riscv/PMAChecker.py Also, here is an example of how this can be used in the gem5 config script: https://gem5.googlesource.com/public/gem5-re

[gem5-users] Making an address range uncacheable RISCV FS.

Hi, I was writing an OS that can run on RISC-V FS mode in gem5. I want to make certain address ranges uncacheable (for some memory mapped devices). RISCV page table entries doesn't provide any flags to achieve this. The proper way to do this in RISCV seems to be using PMA (Physical Memory Attribu

[gem5-users] Adding Delays to Non-Memory Objects?

Hello, I am interested in modeling delays in areas other than the memory system, such as with System Calls. For example, I would like to add a constant cycle delay in doSyscall() (in syscall_desc.hh) before it further calls the intended system call. I imagine it would be similar to MemDelay, exce