On 2/20/2024 9:29 PM, chengyong zhong wrote:
Hi Eliot,
Thanks for your kind reply. Are there any sample to implement the feature in
the Gem5 code repository?
I wrote: Unless I've missed something, gem5 does not provide dual / multi port
caches at present.
Hence, no example (that I am aware o
On 2/20/2024 8:18 AM, chengyong zhong via gem5-users wrote:
Hi all,
I'm using the O3CPU model for performance evaluation, we have two LoadUnit, I find that if dual load issued same time,
the second load will be blocked and rescheduled after a few cycles of latency.
The O3CPUAll and Xbar trace s
Hi all,
I'm using the O3CPU model for performance evaluation, we have two LoadUnit,
I find that if dual load issued same time, the second load will be blocked
and rescheduled after a few cycles of latency.
The O3CPUAll and Xbar trace show:
*The crossbar layer is now busy from tick xxx to xxx*
*
