y before I fill any details.
Thank you,
-Rizwana
On Thu, Feb 12, 2015 at 2:44 AM, Ali Saidi via gem5-users
mailto:gem5-users@gem5.org>> wrote:
I don’t see any errors and I’m able to create a new user.
Have you tried a different user name? Different web browser?
Thanks,
Ali
From: R
ailing
list mailto:gem5-users@gem5.org>>
Subject: Re: [gem5-users] Reviewboard registration error
Hello Ali,
No. It still gives the same error, and redirects to registration page.
Thank you,
-Rizwana
On Wed, Feb 11, 2015 at 4:54 PM, Ali Saidi via gem5-users
mailto:gem5-users@gem5.or
Try now?
Thanks,
Ali
On 2/11/15, 11:36 AM, "Dave Werner via gem5-users"
wrote:
>Rizwana Begum via gem5-users gem5.org> writes:
>
>>
>> Hello All,
>> I am trying to register on review board, but end up with error "An
>internal error occurred: 50EA8B0A168C0.A8CAE85.ED001888".I have been
>tryin
You can dump the stats every 1000 instructions, but it will be quite slow. You
can modify configs/common/Simulate.py to call m5.stats.dump() and
m5.stats.reset() on every exit from the simulation loop which you can program
with cpu.max_insts_any_thread.
Ali
> On Dec 31, 2014, at 3:37 AM, Kuma
The hdlcd should be controlled by the kernel, not by a application as it won’t
have a mapping for the physical addresses. If you download the latest kernels
from the website they support the hdlcd.
Ali
On Nov 27, 2014, at 3:05 AM, via gem5-users wrote:
> Hi,everyone:
>
> I would like to make
If you haven't specified --caches there aren't any caches in the system.
A configuration file the kernel is reading specifies caches exist for
the kernels purposes, but there aren't any in the system.
Ali
On 20.11.2014 15:43, Thom Popovici via gem5-users wrote:
> Hi!
>
> I would like to
You can take that one m5_struct.patch and apply it alone to the kernel
you're trying to use.
Ali
On 07.11.2014 03:46, Sanem Arslan via gem5-users wrote:
> Hi Anthony,
> To apply these patches, should I follow the steps in the following
> link? http://www.m5sim.org/Compiling_a_Linux_Kernel
Hi George,
there isn't a way built into the example configuration scripts to
connect more than one disk image, but if you look for how the
--disk-image (disk_image in the python files) is used you can see that
the parameter is ultimately passed from fs.py into FSConfig.py which
adds that disk
Are you using the latest gem5 code? How long does it take for you to
reach this issue?
The issue is that these instructions have been created, but they haven't
been deleted. This means that some resource in the pipeline is holding a
reference to the instruction and it's not being deleted, the
It's also in the full system files tarball on the download page of the website.
Ali
Sent from my ARM powered mobile device
> On Nov 2, 2014, at 9:34 AM, Guru Prasad via gem5-users
> wrote:
>
> Go to /system/arm and run make
> copy the output to /system/binaries/
>
>
>> On Sun, Nov 2, 2014
The mirror is the current development repository not the stable
repository. There was just a change in the development repository to
switch to using PCI devices for the boot disk. Unfortunately there isn't
really a good way to support both at once, but a new set of kernels is
available on the ge
Do you have enough memory on your x86 machine? It will likely take quite
a bit.
Thanks,
Ali
On 29.10.2014 21:03, Urmish Ajit Thakker via gem5-users wrote:
> Hi,
>
> I was wondering if anyone has tried to install opencv on the arm image
> (armv7) provided in the repository?
>
> I was a
Are you running in SE or FS mode?
For 32-bit ARM code registers 16->32 are various shadow copies of
registers for different interrupt/exception levels.
Ali
On 10/29/14, 10:56 AM, "Negar Miralaei via gem5-users"
wrote:
>Hi guys,
>
>I'm looking at integer register values/accesses at the Physica
Hi Alberto,
Yes it would be great if we could have these fixes. Would you mind
posting them to our review board (reviews.gem5.org)?
With the public/private change below it would probably be best if you
added an accessor methods isLoadStoreBlocked() that was public but left
the variables them
You need to use the ‹machine-type=VExpress_EMM and the Vexpress kernel
from the website.
Thanks,
Ali
On 10/20/14, 6:44 PM, "Ramanan Sivasundaram via gem5-users"
wrote:
>Has anybody got the --dual args working for ARM on gem5? When I try to run
>build/ARM/gem5.opt configs/example/fs.py
>--disk-
and implemented it earlier.
However, I realized after implementing it that this solution would lead to
system calls being unaccounted for, right?
On Thu, Oct 9, 2014 at 2:35 PM, Ali Saidi via gem5-users
mailto:gem5-users@gem5.org>> wrote:
The easiest way to do this is probably to only count instr
The easiest way to do this is probably to only count instructions when
InUserMode() is true. You could wrap the stat accounting function in this in
the o3 commit stage and that would probably solve your problem instead of
trying to cache all sources of interrupts.
Ali
From: Guru Prasad via gem
I think you’re running an older version of gem5. WE’ve recently fixed some of
these issues in the tip of the development repository.
Ali
From: Khaled Mahmoud via gem5-users
mailto:gem5-users@gem5.org>>
Reply-To: Khaled Mahmoud mailto:khaledi...@yahoo.com>>,
gem5 users mailing list mailto:gem5
You can run assembly code, but you’ll need to compile it. Something like the
following will compile with gcc. It uses both ARM and Thumb code.
.text
.syntax unified
.globl _start
.arm
_start:
start:
mov r0, #0x1
mov r1, #0
blx loop
.thumb
.align 7
loop:
add r2, r1, #1
su
dual-test configs/example/fs.py
> --machine-type=VExpress_EMM64
> --kernel=..path../linux-aarch64-gem5-4003908/vmlinux
> --dtb-filename=..path../rtsm_ve-aemv8a-5core.dtb --mem-size=4GB
> --cpu-type=atomic --cpu-clock=2GHz --dual
>
> What am I missing?
>
> Thanks,
>
hot;h=400390889828685d432d38406cbd9c7afceeaa15;sf=tgz";
-O linux-aarch64-gem5.tgz
tar zxvf linux-aarch64-gem5.tgz
cd linux-aarch64-gem5-4003908
make ARCH=arm64 CROSS_COMPILE=aarch64-none-elf- gem5_defconfig
make ARCH=arm64 CROSS_COMPILE=aarch64-none-elf- -j4
Thanks,
Ali
From: Ali Saidi via gem5-users m
You’re not going to have any support for PCIe device with that kernel. We’re
working on the last bit of debugging and polishing around a kernel that will
support it — I intended to have it out 2 weeks ago, but we’re still diligently
working and it should be out in the next couple of days.
Ali
You’d have to add some support to gem5 to segment off a piece of memory for the
AMP and load some code for it to run. Right now all cores jump into a boot
loader where they all spin except cpu0 which boots linux. When linux is ready
to bring up the other cores it sends them an interrupt and they
Did you build the jni with the exact same version of java you're using
to run the program? also, if you run with the jni outside of gem5 I'd
expect to see a fault of some kind.
Thanks,
Ali
On 19.08.2014 11:02, jerry yin via gem5-users wrote:
> Hi all,
>
> I'm following gem5 document st
Hi Ivan,
The kernel that you’re using and the currently gem5 don’t support pci devices
with arm64. I hope to remedy this within a week.
Thanks,
Ali
On Aug 6, 2014, at 3:42 PM, Ivan Stalev via gem5-users
wrote:
> Hi everyone,
>
> I am trying to run a client-server setup using arm64. I am usi
softfp means that fp arguments are passed in integer registers while
hardfp means that fp registers are used to pass fp arguments. They're
two different ABIs the prior allowing for a single binary to run on
systems with and without an FPU and the latter requiring an FPU because
the registers are
I'm not sure what issue you're having, but based on your command line it
looks like you're using quite an old version of gem5 (2.5+ years old).
There are certainly some bugs that have been fixed in the intervening
time.
Here is my attempt to reproduce your problem on a new version of gem5.
You
This shouldn't make a difference.
On 23.07.2014 14:57, Namitha Krishna via gem5-users wrote:
> Hello Senni Sophianne,
>
> To configure gem5 according to parameters mentioned in O3_ARM_v7a.py file you
> need to first type on the command line :
>
> build/ARM/gem5.opt configs/common/O3_ARM
Why don’t you compare the un-modified trace (with —debug-flags=Exec) to the
modified one?
Ali
On Jul 20, 2014, at 11:06 AM, Vanchinathan Venkataramani via gem5-users
wrote:
> I'm trying to execute a binary on ARM gem5 O3CPU model. I made some
> modification to the code.
>
> Now, some instru
We’ll need a better description than that to help. What is printing read error?
The benchmarks or the simulator?
Ali
On Jul 5, 2014, at 4:56 PM, Qi Jia via gem5-users wrote:
> Hi all,
>
> I am trying to add some kind of victim cache in gem5, but when I run the
> benchmark(e.g. mcf), someti
src/cpu/exectrace.*
Ali
On Jun 29, 2014, at 10:16 PM, Sudarshan L Sargur via gem5-users
wrote:
> Greetings fellow Gem5 users,
>
> I'm just starting off with using Gem5 for one of my research projects.
>
> I want to use the built in tracing capabilities of Gem5.
>
> I used the 'Exec' comp
It seems to work for me from the latest gem5 repository:
$./build/ARM/gem5.opt configs/example/fs.py --machine-type=VExpress_EMM
--kernel=/home/ali/gem5/vmlinux-3.3-arm-vexpress-emm-pcie
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details
Hi,
If you want to simulate more RAM on an ARMv8 system you'll need to do something
like the following:
1. Modify the address map definition in gem5 src/dev/arm/RealView.py.
diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py
--- a/src/dev/arm/RealView.py
+++ b/src/dev/arm/Re
That kernel is a 32-bit kernel so you can only use the 32-bit files sytem (not
the 64-bit one). What command line are you running? What does the
system.terminal output file show? Are you specifying the correct machine type
on the command line?
Thanks,
Ali
On Jun 28, 2014, at 2:52 AM, Besta Mac
Speaking of, could you address the two comments on the patch so we can
get it committed?
Thanks,
Ali
On 24.06.2014 09:34, Anthony Gutierrez via gem5-users wrote:
> Sorry. Forgot the link.
>
> http://reviews.gem5.org/r/2174/ [1]
>
> Anthony Gutierrez
> http://web.eecs.umich.edu/~atgu
You shouldn't need to change the android file-system but the kernel will
need to change as the one on gem5.org doesn't support android. We're
trying to get a git where we can put known working kernels. Hopefully
this will happen within the end of the week but if not it should be done
within two.
If you use gcc 4.2 (or at least libc from back then) it will work. I’m not sure
why it doesn’t work with a newer libc, but it’s something to do with the exit
functions and getting the wrong value.
Ali
On Jun 2, 2014, at 12:39 PM, Ali Saidi via gem5-users
wrote:
> Yea, it looks l
You'll need to use the VEMM ARM platform instead of the default. If you
do that you can then use 2047MB of RAM.
Ali
On 31.05.2014 01:18, Vishaal Mohan via gem5-users wrote:
> Hello,
> I am trying to run bbench on an ARM platform with an Android ICS image. If I
> try to use memory size gr
It should work just fine. See
https://www.mail-archive.com/gem5-users@gem5.org/msg09928.html for an
example for how to create a larger disk image.
Ali
On 30.05.2014 06:16, Ahmad Hassan via gem5-users wrote:
> Hi,
>
> gem5img.py utility in gem5 only allows creating disk images up to 7.8GB
Yea, it looks like something changed, perhaps the definition of some of
the structures have changed since the code was written. It looks like
it's happening when the thread is about to exit, and the the wrong
address is being jumped too. You might try an older version of gcc and
see if it works
What test are you running?
Ali
On 30.05.2014 10:35, Jack Harvard via gem5-users wrote:
> To add, x86 SE runs fine
> Jack Harvard
>
> On Fri, May 30, 2014 at 4:21 PM, Jack Harvard wrote:
>
>> Did the same as this
>> http://lacasa.uah.edu/portal/Upload/tutorials/gem5/RunningPrograms-gem5
For ARMv7 you can only really use 2047MB of RAM with the memory map we have in
the simulator. It would be possible to use more with the LPAE extensions we
recently implemented, but it would certainly required some work on your part to
define a new memory map and modify a dtb file appropriately.
The binary you’re trying to run isn’t likely compiled for the alpha
architecture, but rather a different one. You much use the same architecture
and binary format.
Ali
On May 26, 2014, at 9:29 AM, sahar via gem5-users wrote:
> I have problem with running splash2 on gem5 simulator . I use th
You can run cfdisk (or fdisk) on the image and see what it says.
$ fdisk my.img
Command (m for help): p
Disk my.img: 536 MB, 536739840 bytes
16 heads, 63 sectors/track, 1040 cylinders, total 1048320 sectors
Units = sectors of 1 * 512 = 512 bytes
Sector size (logical/physical): 512 bytes / 512
Seems like maybe the partition time isn't set to Linux (83)?
Ali
On 16.05.2014 10:37, Kiyeon Lee via gem5-users wrote:
> Hi.
>
> I need a 32-bit Linux disk image for hardfloat ABI compiled ARM binaries.
> The pre-built disk images provided by the gem5 website
> (http://www.gem5.org/dis
--debug-flags=Exec --debug-start=
Ali
On 08.05.2014 02:13, jiakunli2010 via gem5-users wrote:
> Thanks for the reply. But I don't know how to get to the trace around the
> warning lines. (only the terminated tick printed) How to find the tick at
> which warning appears?
>
> jiakunli201
Perhaps there is some bad data in the srcMasterId? The master Ids are
allocated at the beginning of simulation and the error you're seeing is
that a master ID was either allocated after this or is junk. Each master
id uniquely identifies every device in the system that can generate a
packet.
A
There have been a couple of bugs with the prefetcher. Are you using the
latest version of gem5? This patch may help:
http://reviews.gem5.org/r/2242/
Ali
On 07.05.2014 02:08, Prasanth Nunna via gem5-users wrote:
> Dear gem5-users,
>
> I have designed a new prefetcher and I have run it on g
The page fault you're seeing below is what you would see on a normal
system as a segmentation fault. You're likely referencing a null pointer
plus some offset. You need to look at a trace of the instructions and
memory system, see how that address is generated and assuming it's the
problem I men
You can modify the current gic model to support more cores (and the
associated linux driver). Similarly, it's simply a question of changing
the memory map in the dtb file if you'd like more than 2GB of ram.
Ali
On 05.05.2014 11:46, Embedded Systems MadHatter via gem5-users wrote:
> Thanks,
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