Re: [gem5-users] gem5 stable release proposal [PLEASE VOTE!]

Hello, - I think master should be stable. - I think gem5 should be released three times per year. Regards, -- Kleovoulos Kalaitzidis Doctorant - Équipe PACAP Centre de recherche INRIA Rennes - Bretagne Atlantique Bâtiment 12E, Bureau E301, Campus de Beaulieu, 35042 Rennes Cedex, France

Re: [gem5-users] Use checkpoints that have been created from older GEM5 version

Hello, for upgrading checkpoints you can use the "cpt_upgrader.py" in util/cpt_upgraders. Normally, this will do, unless some upgrade is not implemented already. Then you have to create alone the equivalent upgrader to call. Hope it helps. -- Kleovoulos Kalaitzidis Doctorant - Éq

Re: [gem5-users] questions about template policies in O3CPU

e .c files are the ones that include the necessary header files and are given as source for compilation in the SConscript file, for instance in the one in the o3 folder, when it comes to the o3 model. Hope it helps. Regards, -- Kleovoulos Kalaitzidis Doctorant - Équipe PACAP Centre de reche

Re: [gem5-users] SPECCPU 2006 application crashes on x86 gem5

structions that are not implemented and will abort the execution : [ https://gem5-users.gem5.narkive.com/jO22f7kV/spec2017-on-gem5-se-mode | https://gem5-users.gem5.narkive.com/jO22f7kV/spec2017-on-gem5-se-mode ] Regards, -- Kleovoulos Kalaitzidis Doctorant - Équipe PACAP Centre de recherche INRIA Rennes

Re: [gem5-users] On checkpointing while using custom config file

tinue execution using the same .rcS script, it will actually continue after the first m5 exit, which is just after booting. Hope it helps, -- Kleovoulos Kalaitzidis Doctorant - Équipe PACAP Centre de recherche INRIA Rennes - Bretagne Atlantique Bâtiment 12E, Bureau E321, Campus de Beaulieu,

[gem5-users] Switching off AVX-512 for running SPEC 2017 in SE mode

but still the problem is the same. Maybe the question is not that gem5-relevant, but if somebody has successfully disabled these instructions and run in SE (X86) the SPEC 2017 benchmarks, would be of great help. Thank you in advance, -- Kleovoulos Kalaitzidis Doctorant - Équipe PACAP

Re: [gem5-users] Problem on restoring checkpoint while using O3CPU in Full System mode

use the flags I mention (--debug-flags=Exec,LocalApic,Faults) to see if the problem is related with the same issue. Looking forward for any feedback. Regards, -- Kleovoulos Kalaitzidis Doctorant - Équipe PACAP Centre de recherche INRIA Rennes - Bretagne Atlantique Bâtiment 12E, Bureau

Re: [gem5-users] Microcode_ROM page fault not handled

) or of the SPEC benchmarks, I think there should had been a way to detect and stop/exit gem5 when a page fault goes into an infinite loop. I would appreciate any feedback regarding this point. -- Kleovoulos Kalaitzidis Doctorant - Équipe PACAP Centre de recherche INRIA Rennes - Bretagne At

Re: [gem5-users] Microcode_ROM page fault not handled

d then restore them respectively. If this different output in comparison with the previous one can give an idea to someone please let me know. Thank you a lot for your help. -- Kleovoulos Kalaitzidis Doctorant - Équipe PACAP Centre de recherche INRIA Rennes - Bretagne Atlantique Bâtim

Re: [gem5-users] Microcode_ROM page fault not handled

Hello, just to give more detail, I have attached here a part of the simout file before the first appearance of the page fault that after keeps executing. -- Kleovoulos Kalaitzidis Doctorant - Équipe PACAP Centre de recherche INRIA Rennes - Bretagne Atlantique Bâtiment 12E, Bureau E321

[gem5-users] Microcode_ROM page fault not handled

and comprehensive as possible. I would really appreciate your help because my knowledge over gem5 can not really help me solve this. I am looking forward to hearing from anyone having any idea... Thank you a lot in advance. -- Kleovoulos Kalaitzidis Doctorant - Équipe PACAP Centre de recherche INRIA

[gem5-users] Device Tree Blob(dtb) file to use with aarch64

something matching exactly and I did not find a lot of documentation so I would be grateful if somebody can help. Thank you in advace, Kind regards -- Kleovoulos Kalaitzidis Doctorant - Équipe PACAP Centre de recherche INRIA Rennes - Bretagne Atlantique Bâtiment 12E, Bureau E321,

Re: [gem5-users] How to associate a kernel offset to a linux image for full system simulation?

y with gem5. I would be grateful if somebody could give me his advice. Thank you very much in advance, -- Kleovoulos Kalaitzidis Doctorant - Équipe PACAP Centre de recherche INRIA Rennes - Bretagne Atlantique Bâtiment 12E, Bureau E321, Campus de Beaulieu, 35042 Rennes Cedex, France

Re: [gem5-users] How to associate a kernel offset to a linux image for full system simulation?

. -- Kleovoulos Kalaitzidis Doctorant - Équipe PACAP Centre de recherche INRIA Rennes - Bretagne Atlantique Bâtiment 12E, Bureau E321, Campus de Beaulieu, 35042 Rennes Cedex, France From: "Ciro Santilli" To: "gem5 users mailing list" Sent: Monday, July 30, 2018 5:31:26 PM

[gem5-users] How to associate a kernel offset to a linux image for full system simulation?

on. Would anyone be able to give directions on how to understand and solve this issue? -- Kleovoulos Kalaitzidis Doctorant - Équipe PACAP Centre de recherche INRIA Rennes - Bretagne Atlantique Bâtiment 12E, Bureau E321, Campus de Beaulieu,

Re: [gem5-users] Adding a new resource

. And then normally use it within the other structures in the pipeline. Hope it helps. -- Kleovoulos Kalaitzidis Doctorant - Équipe PACAP Centre de recherche INRIA Rennes - Bretagne Atlantique Bâtiment 12E, Bureau E321, Campus de Beaulieu, 35042 Rennes Cedex, France - Original Message

Re: [gem5-users] Is it a way to change the behavior of "load" and "store"?

). There you can find all decoded instructions and their implementation. Though these apply for a detailed/timing simulation, I am not sure if it helps. Good luck! -- Kleovoulos Kalaitzidis Doctorant - Équipe PACAP Centre de recherche INRIA Rennes - Bretagne Atlantique Bâtiment 12E, Bureau

[gem5-users] How to define which source Reg is the one stored in memory? (for ARM AArch64)

something better to share it with me. Thank you very much in advance and sorry for the long-complicated mail. -- Kleovoulos Kalaitzidis Doctorant - Équipe PACAP Centre de recherche INRIA Rennes - Bretagne Atlantique Bâtiment 12E, Bureau E321, Campus de Beaulieu, 35042 Rennes Cedex, France _

Re: [gem5-users] Datatype (data-width) of NEON operations for ARM in Gem5

on the bit representation, and you can use the same pattern of the decoder to identify an instruction beyond strcompare. So, for a given instruction you can find its macro in the decoder, grep it in the generated files to see its actual implementation and sizes etc. I hope it helps. -- Kleovoulos K

Re: [gem5-users] Fetch buffer and Instruction queue

scheduler-IQ/LSQ, from where they are actually executed. Hope it helps. -- Kleovoulos Kalaitzidis Doctorant - Équipe PACAP Centre de recherche INRIA Rennes - Bretagne Atlantique Bâtiment 12E, Bureau E321, Campus de Beaulieu, 35042 Rennes Cedex, France - Original Message - >

Re: [gem5-users] Default functional units

hat's what I know. -- Kleovoulos Kalaitzidis Doctorant - Équipe PACAP Centre de recherche INRIA Rennes - Bretagne Atlantique Bâtiment 12E, Bureau E321, Campus de Beaulieu, 35042 Rennes Cedex, France - Original Message - > From: "Ayman Moussa" <ayman.mouss...@i

Re: [gem5-users] Default functional units

the file "fu_pool.cc" in the main constructor and it will become clear to you. Kind regards, -- Kleovoulos Kalaitzidis Doctorant - Équipe PACAP Centre de recherche INRIA Rennes - Bretagne Atlantique Bâtiment 12E, Bureau E321, Campus de Beaulieu, 35042 Rennes Cedex, France -