um 18:35 Uhr
Von: "Eliot Moss"
An: "The gem5 Users mailing list"
Cc: reverent.gr...@web.de
Betreff: Re: [gem5-users] Re: Architectural state of registers - O3CPU
On 2/14/2024 12:26 PM, reverent.green--- via gem5-users wrote:
> Hey Eliot,
> thank you for your answer. I
024 um 17:47 Uhr
Von: "Eliot Moss"
An: "The gem5 Users mailing list"
Cc: reverent.gr...@web.de
Betreff: Re: [gem5-users] Architectural state of registers - O3CPU
On 2/14/2024 11:19 AM, reverent.green--- via gem5-users wrote:
> Hello everyone,
> can someone give me a hin
Hello everyone,
can someone give me a hint, where exactly in the code the architectural state of (load) instructions is getting set and becomes visible? I tried to trace instructions during the execution via log outputs, but got a bit lost during the IEW stage.
I know, that instructions,
e commit/retire time of the faulty instruction, the following instructions will proceed as normal. These following instructions will be squashed when the previous faulty instruction is handled.
On Tue, Jan 23, 2024 at 10:41 PM reverent.green--- via gem5-users <gem5-users@gem5.org> wrote:
Hell
Hello everyone,
I have a C PoC code with the crucial part written in inline assembly, trying to exploit transient executions.
The Konata pipeline viewer showed, that first my faulty instruction (triggers pagefault because of failed permission check in tlb.cc) is executed and moved along the
: D=0053"
Kind regards
Robin
Gesendet: Freitag, 29. Dezember 2023 um 19:32 Uhr
Von: "reverent.green--- via gem5-users"
An: gem5-users@gem5.org
Cc: reverent.gr...@web.de
Betreff: [gem5-users] Transient execution during Page Fault - X86 O3 FS simulation
Hello e
Hello everyone,
I am currently looking into transient execution vulnerabilities using the gem5 simulator. I successfully tried out the spectre example and want to create something similar for meltdown.
For these experiments, I am using the O3 CPU model.
- The first step was to change the
Hello everyone,
I am currently using "x86-ubuntu-18.04.img" and "x86-linux-kernel-5.4.49" from gem5 resources for my full-system simulation in gem5.
For my next experiment, I need a custom kernel module, which I already inserted into and built in the ubuntu image. The problem is, that the
Hello everyone,
I am trying to load a kernel module (https://github.com/misc0110/PTEditor#install-kernel-part-from-source) into the running Linux kernel while executing my code. My goal is to get PTEditor working inside the full system simulation.
Now I have a few questions:
1. Is it possible
t;Page-Fault" message is printed out on the constructor of a fault, so gdb that line and move up frames can help.
By the way, a page fault can also be generated during page walks (see here). The faulty PTE is not inserted into TLB. Debug flag PageTableWalker tracks all these erran
er 2023 um 17:00 Uhr
Von: "Eliot Moss via gem5-users"
An: "The gem5 Users mailing list" , yuan@it.uu.se
Cc: reverent.gr...@web.de, "Eliot Moss"
Betreff: [gem5-users] Re: Squashing Instructions after Page Table Fault
On 10/4/2023 10:03 AM, reverent.green--- via g
The above is based on gem5 21.0.0.0 but I don't think the code changes much for the above discussions.
Hope this helps.
PS. Page access write is checked at the translate function in tlb.cc.
Br,
Yuan
On 9/29/23 12:28, reverent.green--- via gem5-users wrote:
A short addition. I also
: "reverent.green--- via gem5-users"
An: gem5-users@gem5.org
Cc: reverent.gr...@web.de
Betreff: [gem5-users] Squashing Instructions after Page Table Fault
Hello,
I am currently trying to locate the code that is used to squash instructions if a Page Table Fault is triggered in the O3 C
Hello,
I am currently trying to locate the code that is used to squash instructions if a Page Table Fault is triggered in the O3 CPU.
After using the PageTableWalker Debug Flags, my current guess would be gem5/src/arch/x86/pagetable_walker.cc in line 199.
Furthermore I inspected the files in
ceed to memory. You can check the O3 code to be sure, though.
Cheers,
Jason
On Thu, Jul 20, 2023 at 2:52 AM reverent.green--- via gem5-users <gem5-users@gem5.org> wrote:
Hello everyone,
I am currently working on a meltdown simulation & analysis using the fs.py script.
Hello everyone,
I am currently working on a meltdown simulation & analysis using the fs.py script. Using se.py is not possible, because there is no kernel space mapping.
As for the meltdown test code, I'm using this repo: https://github.com/IAIK/meltdown
After playing a bit with the
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