Hello all,
I'm working with the arm-detailed core in gem5. I'm trying to compare
execution times of some floating point programs on cortex A9 hardware using
cycle count register and my configured gem5 model (configured for cortex
A9). I'm observing some strange behaviour with decoding of load and
Are you sure its actually ignoring dependencies? Run with
--debug-flags=IntRegs,FloatRegs. To verify what vdivs wrote and what vstr
read.
I'd assume it's just a bug in the gem5 generateDissasembly routine printing
out the instruction format. It probably just passed reg 15, meaning
floating