Re: [gem5-users] Adding latencies in cache accesses

2019-10-16 Thread Daniel Carvalho
Victor, It depends on how you want the latency to be added. recvTimingResp() will receive the packet at tick X, and will start the filling process, which is done off the critical path, and thus we only need to care about this latency to schedule the evictions caused by this fill. In any case,

Re: [gem5-users] Adding latencies in cache accesses

2019-10-16 Thread Victor Kariofillis
Hi Daniel, First of all thanks for answering. I have some more questions. In my case, latencies are added every time data is written to the cache. So for example, theoretically latency should be added in handleFill() as well. I see that handleFill() doesn't have any latency computation in it. It

[gem5-users] [gem5]: SHA2 and SHA3 on gem5

2019-10-16 Thread ABD ALRHMAN ABO ALKHEEL
Hello everyone, I wanna run the sha3 and sha2 on gem5. I need your help. Best Regards ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

[gem5-users] How to implement an Instruction Set Simulator with gem5?

2019-10-16 Thread Libo Zhou
Hi all, We need to implement an instruction set simulator for a very simple CPU, and I think gem5's SE mode looks promising to me. Our ISA is a subset of MIPS-I, except that SW and LW instructions have their original opcodes changed. To begin with, I removed all the unused instructions in