Re: [gem5-users] Maximum number of instructions to simulate

Hey Farzad, You could check out the function "FullO3CPU::instDone(ThreadID tid, DynInstPtr )" in src/cpu/o3/cpu.cc. This updates a thread-Id based committed instruction stat - "committedInsts[tid]++". I guess you could modify the code there and use it to exit (from within Gem5) on a

[gem5-users] Maximum number of instructions to simulate

Hi, I would like to terminate the simulation when a specific cpu (e.g. cpu 1) reaches a specific number of instructions. I am currently using the "-I" option which terminates when any of the cpus reaches the specified number of instructions. I am simulating in FS mode using example/fs.py.

Re: [gem5-users] X86 new format

Thanks Gabe . I want to ask you how can i add this format to assembler and to gem5 x86 decoder ? ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

Re: [gem5-users] Constant Defined but not Used

Yeah, that's what I figured. But I was also under the impression that const was supposed to ignore that, and I believe static const and const are supposed to be the same thing. I did try using static const for one of the constants, but it still gave me the defined but not used error. The only

Re: [gem5-users] add parameter in params

Hi Jason Thank you. I look at http://learning.gem5.org/book. but in newer version of gem5 used ClockedObjectParams (that inherits from SimObjectParamsa) to define constructor's parameter list. my problem is that I want to initialize those const params when new object of class was created. for

Re: [gem5-users] Need Linux Kernel with 256 core for X86

Thanks for earliest reply. 1. I know how to set the 256 core in Linux kernel using make menuconfig. However, the main problem is the current gem5 version is not even allowing to run the 16 core for Linux kernel 2.6.28.4, which is always showing kernel panic as I mentioned below. Old version

Re: [gem5-users] Constant Defined but not Used

Hi Alec, I'm not sure if this really answers your question, but there are a number of places in the code where for different compiler options some variables are unused. This often happens when doing debug checks (e.g., asserts) which are removed when compiling fast mode. To ignore these warnings

Re: [gem5-users] Non exclusive cache in gem5

Hello, The classic cache in gem5 (src/mem/cache and Cache()) is always non-inclusive (i.e., it is neither inclusive nor exclusive). You can set whether it is "mostly-inclusive" or "mostly-exclusive" as a parameter to the Cache SimObject. If the cache is "mostly-exclusive" it will not fill on a

[gem5-users] Need Linux Kernel with 256 core for X86

Dear All, I basically want to run the benchmarks like- splash or parsec with 256 cores . Hence, I tried with X86 ISA with the linux kernel from the Parsec site ( http://www.cs.utexas.edu/~parsec_m5/), which returns the kernel panic with "warn: x86 cpuid family 0x: unimplemented function 13".

[gem5-users] Can we eliminate the effect of Reorder Buffer (ROB) in the O3 CPU

As far as I know, the O3 CPU is based on the ALPHA 21264, which use the Reorder Buffer (ROB) to make the instruction in-order commit, (OoO execution, but in-order commit). 1. What parameters do I need to set to reduce the effect of Reorder buffer, which means to make it out-of-order commit