Re: [gem5-users] (no subject)
Your logic sounds correct to me for single core. For multi core, the last level cache is shared, and you can get block from other core’s L1 dcache. So you need to think through about what behavior you are expecting from your design and make changes or keep things same. On Mon, May 13, 2019 at 12:02 AM Muhammad Avais wrote: > Dear Abhishek, > > Many thanks for your reply. I will set the flag in response packet > for L2 hit. This flag will be default reset, therefore, I think I will not > need main memory flag in this case. > Please, let me know if you feel a problem in this logic. > For multicore simulation, what should be the difference? > > Many thanks for your response, > Best regards, > Avais > > On Sat, May 11, 2019 at 8:15 AM Abhishek Singh < > abhishek.singh199...@gmail.com> wrote: > >> What you do, is create flags in src/mem/packet.hh for various cache >> levels. >> Whenever you hit in L2, you can set the L2flag in response pkt. >> And if it is misses in L2, set main memory flag in response pkt, as you >> are sure you will get data from main memory. >> Here we are assuming it’s a single core simulation. >> >> On Fri, May 10, 2019 at 5:42 AM Muhammad Avais >> wrote: >> >>> Dear All, >>> >>> 1- For blocks loaded in the L1 cache, how can I distinguish that it was >>> loaded into the L1 cache from the L2 cache (L2 hit) or main memory (L1 >>> cache)? >>> >>> Many thanks, >>> Best Regards, >>> Avais >>> ___ >>> gem5-users mailing list >>> gem5-users@gem5.org >>> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >> >> ___ >> gem5-users mailing list >> gem5-users@gem5.org >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > ___ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
Re: [gem5-users] (no subject)
Dear Abhishek, Many thanks for your reply. I will set the flag in response packet for L2 hit. This flag will be default reset, therefore, I think I will not need main memory flag in this case. Please, let me know if you feel a problem in this logic. For multicore simulation, what should be the difference? Many thanks for your response, Best regards, Avais On Sat, May 11, 2019 at 8:15 AM Abhishek Singh < abhishek.singh199...@gmail.com> wrote: > What you do, is create flags in src/mem/packet.hh for various cache levels. > Whenever you hit in L2, you can set the L2flag in response pkt. > And if it is misses in L2, set main memory flag in response pkt, as you > are sure you will get data from main memory. > Here we are assuming it’s a single core simulation. > > On Fri, May 10, 2019 at 5:42 AM Muhammad Avais > wrote: > >> Dear All, >> >> 1- For blocks loaded in the L1 cache, how can I distinguish that it was >> loaded into the L1 cache from the L2 cache (L2 hit) or main memory (L1 >> cache)? >> >> Many thanks, >> Best Regards, >> Avais >> ___ >> gem5-users mailing list >> gem5-users@gem5.org >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > ___ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
Re: [gem5-users] (no subject)
Hello Nazish, If you are using classic memory, edit src/mem/cache/base.cc file’s recvTimingReq function. You can access the old data through blk->data and the new data by pkt->getdata(this you need to search in src/mem/packet.hh, I may have made mistake in writing correct name of the function). On Sun, May 12, 2019 at 2:52 AM Nazish Shabbir wrote: > Hello! I am relatively new to gem5 and trying to implement an encoding > scheme in it but not exactly sure what the best approach to implementing > this would be. > > The way i would like this to work is when there is a write access to the > last level cache, we need to read the old data in the last level cache. > Then we compare the new cache line with the old cache line to calculate the > HTs and STs. > > Where would you recommend i look to start implementing this? Which place > i need to start modifying? > > Thanks! > ___ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
