[gem5-users] Re: Traces of instructions only.

2020-05-06 Thread Ciro Santilli via gem5-users
There is no stupid question around here, ask away :-)

On Wed, May 6, 2020 at 10:33 PM Øivind Harket Bakke via gem5-users
 wrote:
>
> Dear Santilli,
>
> that fixed everything except my embarrassment.
> Thank you very much, really appriciated!
>
> Best regards,
> Øivind
> ___
> gem5-users mailing list -- gem5-users@gem5.org
> To unsubscribe send an email to gem5-users-le...@gem5.org
> %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
___
gem5-users mailing list -- gem5-users@gem5.org
To unsubscribe send an email to gem5-users-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-users] Re: Traces of instructions only.

2020-05-06 Thread Øivind Harket Bakke via gem5-users
Dear Santilli,

that fixed everything except my embarrassment.
Thank you very much, really appriciated!

Best regards,
Øivind
___
gem5-users mailing list -- gem5-users@gem5.org
To unsubscribe send an email to gem5-users-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-users] Re: Traces of instructions only.

2020-05-06 Thread Ciro Santilli via gem5-users
Maybe did you mean to use -ExecMicro to remove microops rather than
-ExecMacro? E.g. one STP generates 4 microops as shown at:
https://cirosantilli.com/linux-kernel-module-cheat/#gem5-execall-trace-format



On Wed, May 6, 2020 at 8:54 PM Øivind Harket Bakke via gem5-users
 wrote:
>
> Hi all,
>
> I'm currently trying to export traces from a simulation, but I'm only 
> interested in the instructions that are being simulated. I compare the stats 
> file (# of simulated instructions) to the traces and they don't match in 
> size. I've tried to figure out which are the excessive lines in order filter 
> them out. So my question is as follows: How would I proceed to get traces of 
> the instructions only?
>
> Here's the command I run:
> ./build/ARM/gem5.opt --debug-flags=Exec,-ExecMacro --debug-file=trace.out -d 
> configs/Forschung/arm/1G-500M/ configs/Forschung/arm/starter_se.py 
> --cpu="hpi_nL" --cpu-freq="1GHz" tests/test-progs/hello/bin/arm/linux/hello
>
> For clearification, the config file is a copy of the one in arm examples, 
> just adding a HPI model without L2 caches.(hpi_nL)
> I've checked out the --debug-help option, but as far as I could tell, there 
> were no flags to remove from Exec or other flags to enable in order to reach 
> my goal.
>
>
> Thanks in advance,
> Øivind Harket Bakke
> ___
> gem5-users mailing list -- gem5-users@gem5.org
> To unsubscribe send an email to gem5-users-le...@gem5.org
> %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
___
gem5-users mailing list -- gem5-users@gem5.org
To unsubscribe send an email to gem5-users-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-users] Re: Traces of instructions only.

2020-05-06 Thread Øivind Harket Bakke via gem5-users
Hi Jason,

I read through the documentation you linked me and I've actually looked at it 
before. Only problem is that I need an in-order cpu to represent the hardware 
that we use. I'll take a closer look at it and see if I can make it work, or 
atleast run some tests with this to learn more about it and maybe implement 
atleast parts of it later.

Thank you very much.

Best regards,
Øivind
___
gem5-users mailing list -- gem5-users@gem5.org
To unsubscribe send an email to gem5-users-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-users] Re: Running simple program with atomic memory at different frequencies. Tick count in the traces are confusing.

2020-05-06 Thread Øivind Harket Bakke via gem5-users
Hi Jason,

thank you very much for your fast reply. 
I thought about what you wrote and it makes sense. I thought by having only a 
cpu and memory, I could remove the timing of the memory to simulate the CPU 
alone. Would have been somewhat a dirty solution anyway.

Thanks again.

Best regards,
Øivind
___
gem5-users mailing list -- gem5-users@gem5.org
To unsubscribe send an email to gem5-users-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-users] Re: Traces of instructions only.

2020-05-06 Thread Jason Lowe-Power via gem5-users
Hi Øivind,

I would check out the documentation on the TraceCPU:
http://www.gem5.org/documentation/general_docs/cpu_models/TraceCPU. I think
that page describes how to capture the traces.

Cheers,
Jaosn

On Wed, May 6, 2020 at 12:53 PM Øivind Harket Bakke via gem5-users <
gem5-users@gem5.org> wrote:

> Hi all,
>
> I'm currently trying to export traces from a simulation, but I'm only
> interested in the instructions that are being simulated. I compare the
> stats file (# of simulated instructions) to the traces and they don't match
> in size. I've tried to figure out which are the excessive lines in order
> filter them out. So my question is as follows: How would I proceed to get
> traces of the instructions only?
>
> Here's the command I run:
> ./build/ARM/gem5.opt --debug-flags=Exec,-ExecMacro --debug-file=trace.out
> -d configs/Forschung/arm/1G-500M/ configs/Forschung/arm/starter_se.py
> --cpu="hpi_nL" --cpu-freq="1GHz" tests/test-progs/hello/bin/arm/linux/hello
>
> For clearification, the config file is a copy of the one in arm examples,
> just adding a HPI model without L2 caches.(hpi_nL)
> I've checked out the --debug-help option, but as far as I could tell,
> there were no flags to remove from Exec or other flags to enable in order
> to reach my goal.
>
>
> Thanks in advance,
> Øivind Harket Bakke
> ___
> gem5-users mailing list -- gem5-users@gem5.org
> To unsubscribe send an email to gem5-users-le...@gem5.org
> %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
___
gem5-users mailing list -- gem5-users@gem5.org
To unsubscribe send an email to gem5-users-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-users] Re: Running simple program with atomic memory at different frequencies. Tick count in the traces are confusing.

2020-05-06 Thread Jason Lowe-Power via gem5-users
Hi Øivind,

Atomic mode should not be used for timing. While *some* timing is required
even in atomic mode (gem5 is still an event driven simulator), the timing
is meaningless.

To answer your question as to "why": it's because only the memory system is
"atomic" the rest of the simulator is still operating with some timing.

Cheers,
Jason

On Wed, May 6, 2020 at 1:11 PM Øivind Harket Bakke via gem5-users <
gem5-users@gem5.org> wrote:

> Hi all,
>
> quick question regarding atomic memory. I'm using the starter_se.py config
> script (gem5/configs/example/arm/) and with memory mode being atomic. For
> what I understood, using atomic memory mode should provide the data
> irregardless of its position in memory(L1, L2 or off-chip mem) within the
> next (simulation) clock cycle. When running a simple program and exporting
> the traces at a cpu frequency of 1GHz and 500MHz, I assumed the tick-count
> to be equal, meaning 1GHz would finish at half the time of the 500MHz. To
> my surprice it didn't, leading me to believe there are some other system
> dependencies running at a different frequency. Does anyone know what that
> might be, or any clue what causes these different runtimes? I tried setting
> the system frequency to match the clock frequency aswell, with the same
> result. I ended up with a factor of 1.24 more ticks in the 500MHz
> simulation.
>
> Thanks in advance,
> Øivind Harket Bakke
> ___
> gem5-users mailing list -- gem5-users@gem5.org
> To unsubscribe send an email to gem5-users-le...@gem5.org
> %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
___
gem5-users mailing list -- gem5-users@gem5.org
To unsubscribe send an email to gem5-users-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-users] Running simple program with atomic memory at different frequencies. Tick count in the traces are confusing.

2020-05-06 Thread Øivind Harket Bakke via gem5-users
Hi all,

quick question regarding atomic memory. I'm using the starter_se.py config 
script (gem5/configs/example/arm/) and with memory mode being atomic. For what 
I understood, using atomic memory mode should provide the data irregardless of 
its position in memory(L1, L2 or off-chip mem) within the next (simulation) 
clock cycle. When running a simple program and exporting the traces at a cpu 
frequency of 1GHz and 500MHz, I assumed the tick-count to be equal, meaning 
1GHz would finish at half the time of the 500MHz. To my surprice it didn't, 
leading me to believe there are some other system dependencies running at a 
different frequency. Does anyone know what that might be, or any clue what 
causes these different runtimes? I tried setting the system frequency to match 
the clock frequency aswell, with the same result. I ended up with a factor of 
1.24 more ticks in the 500MHz simulation.

Thanks in advance,
Øivind Harket Bakke
___
gem5-users mailing list -- gem5-users@gem5.org
To unsubscribe send an email to gem5-users-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-users] Traces of instructions only.

2020-05-06 Thread Øivind Harket Bakke via gem5-users
Hi all,

I'm currently trying to export traces from a simulation, but I'm only 
interested in the instructions that are being simulated. I compare the stats 
file (# of simulated instructions) to the traces and they don't match in size. 
I've tried to figure out which are the excessive lines in order filter them 
out. So my question is as follows: How would I proceed to get traces of the 
instructions only?

Here's the command I run: 
./build/ARM/gem5.opt --debug-flags=Exec,-ExecMacro --debug-file=trace.out -d 
configs/Forschung/arm/1G-500M/ configs/Forschung/arm/starter_se.py 
--cpu="hpi_nL" --cpu-freq="1GHz" tests/test-progs/hello/bin/arm/linux/hello

For clearification, the config file is a copy of the one in arm examples, just 
adding a HPI model without L2 caches.(hpi_nL)
I've checked out the --debug-help option, but as far as I could tell, there 
were no flags to remove from Exec or other flags to enable in order to reach my 
goal.


Thanks in advance,
Øivind Harket Bakke
___
gem5-users mailing list -- gem5-users@gem5.org
To unsubscribe send an email to gem5-users-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s