[gem5-users] Fwd: How calculate power in mcpat
Hi, According to the mcpat paper, it calculates power with this Equation: total power= dynamic power + short-circuit power + leakage power when I ran mcpat , I couldn't understand which of paramets are dynamic , short-circuit and static(leakage) power in output-imcpat . Could someone guide me which parameters are static and short-circuit and dynamic power ? Best Regards. *McPAT (version 1.3 of Feb, 2015) results (current print level is 5)* Technology 65 nm Interconnect metal projection= aggressive interconnect technology projection Core clock Rate(MHz) 2000*Processor: Area = 391.232 mm^2 Peak Power = 778.824 W Total Leakage = 179.53 W Peak Dynamic = 599.294 W Subthreshold Leakage = 163.458 W Subthreshold Leakage with power gating = 66.6128 W Gate Leakage = 16.0724 W Runtime Dynamic = 547.762 W* ___ gem5-users mailing list -- gem5-users@gem5.org To unsubscribe send an email to gem5-users-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-users] How calculate power in mcpat
Hi, According to the mcpat paper, it calculates power with this Equation: total power= dynamic power + short-circuit power + leakage power when I ran mcpat , I couldn't understand which of paramets are dynamic , short-circuit and static(leakage) power in output-imcpat . Could someone guide me which parameters are static and short-circuit and dynamic power ? Best Regards. *McPAT (version 1.3 of Feb, 2015) results (current print level is 5)* Technology 65 nm Interconnect metal projection= aggressive interconnect technology projection Core clock Rate(MHz) 2000*Processor: Area = 391.232 mm^2 Peak Power = 778.824 W Total Leakage = 179.53 W Peak Dynamic = 599.294 W Subthreshold Leakage = 163.458 W Subthreshold Leakage with power gating = 66.6128 W Gate Leakage = 16.0724 W Runtime Dynamic = 547.762 W* ___ gem5-users mailing list -- gem5-users@gem5.org To unsubscribe send an email to gem5-users-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-users] Calculate power with mcpat
Hi, According to the mcpat paper, it calculates power with this Equation(paper is attached in Appendix): [image: image.png] when I ran mcpat , I couldn't understand which of paramets are dynamic , short-circuit and static(leakage) power in output-imcpat . Could someone guide me which parameters are static and short-circuit and dynamic power ? Best Regards. [image: image.png] ___ gem5-users mailing list -- gem5-users@gem5.org To unsubscribe send an email to gem5-users-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-users] Re: Memory Addresses in Gem5
I forgot to mention that I want to do that on O3CPU.
Thanks
From: ABD ALRHMAN ABO ALKHEEL via gem5-users
Sent: Sunday, August 16, 2020 7:02 PM
To: Ciro Santilli
Cc: gem5 users mailing list ; Ahmed, Md Rubel
; ABD ALRHMAN ABO ALKHEEL
Subject: [gem5-users] Re: Memory Addresses in Gem5
Hi Ciro,
Thanks for your email.
I added the following after CompleteDataAccess in LSQ_unit_impl to access the
memory and read data from an address.
I have two issues which are how to specify the data size (256 bytes) and get
the memory port. Any help would be appreciated.
RequestPtr req1;
PacketPtr newPkt = new Packet(req1, MemCmd::ReadReq);
newPkt->setAddr(pkt->getAddr());
cpu->getPort().sendFunctional(newPkt)
From: Ciro Santilli
Sent: Sunday, August 16, 2020 5:46 AM
To: ABD ALRHMAN ABO ALKHEEL
Cc: gem5 users mailing list ; Ahmed, Md Rubel
Subject: Re: [gem5-users] Re: Memory Addresses in Gem5
On Sat, Aug 15, 2020 at 9:54 PM ABD ALRHMAN ABO ALKHEEL
wrote:
>
> Hi Ciro,
>
> Could you tell me where can i find the file that does an ifetch for
> AtomicsimpleCPU in gem5?
>
https://github.com/gem5/gem5/blob/fa70478413e4650d0058cbfe81fd5ce362101994/src/cpu/simple/atomic.cc#L673
up to sendFetch below (find Atomic file source and grep :-) ) Some
notes also under:
https://cirosantilli.com/linux-kernel-module-cheat/#gem5-packet-vs-request
> Also, How to print the data from the packet (I assumed the loaded data is
> stored in the pkt).
> should I use
> pkt->getRaw()
> or
> pkt->getLE()
> or
> pkt->getBE()
> or
> pkt->setData()
> or
> pkt->writeData()
>
Have a look at the source under Eclipse :-) all of those get the
packet data with small variations, but it is raw binary.
To see it as hex you need to convert binary to ASCII hex first. I want
to push a simple patch for this in the near future, but you can do it
manually easily too for now:
https://stackoverflow.com/a/27173017/895245
> Thanks
>
>
> From: Ciro Santilli
> Sent: Wednesday, August 12, 2020 7:18 AM
> To: gem5 users mailing list
> Cc: Ahmed, Md Rubel ; ABD ALRHMAN ABO ALKHEEL
>
> Subject: Re: [gem5-users] Re: Memory Addresses in Gem5
>
> I recommend that you have a look at the source of how AtomicSimpleCPU
> does an ifetch under Eclipse. It should be easy to understand
> everything quickly from there.
>
> The Packet address is physical (which notably what caches and DRAM
> work on), just have a look at the constructor of packet:
>
> Packet(const RequestPtr &_req, MemCmd _cmd)
> : cmd(_cmd), id((PacketId)_req.get()), req(_req),
>data(nullptr), addr(0), _isSecure(false), size(0),
>_qosValue(0), headerDelay(0), snoopDelay(0),
>payloadDelay(0), senderState(NULL)
> {
> if (req->hasPaddr()) {
> addr = req->getPaddr();
>
> So you have to do translation before. Translation sets the physical
> address on the Request, which contains both _paddr and _vaddr fields.
>
> Another option is to have a look at how some of the memory tests are doing it.
>
> On Wed, Aug 12, 2020 at 1:55 AM ABD ALRHMAN ABO ALKHEEL via gem5-users
> wrote:
> >
> > Hi,
> >
> > Thank you for your email.
> >
> > Do you have any idea how to construct a packet with a request to read from
> > the memory address? For instance, let us assume that the address that I
> > want to read the data from it is (0x2345), I want to read the 256 bytes of
> > this address (0x2300-0x23ff)? I want to do that for debugging like this
> > https://www.gem5.org/_pages/static/scripts/part2/memoryobject/simple_memobj.cc.
> >
> > Any help would be appreciated.
> >
> > Thanks
> >
> >
> > From: Ahmed, Md Rubel via gem5-users
> > Sent: Wednesday, August 12, 2020 12:44 AM
> > To: gem5 users mailing list
> > Cc: Ahmed, Md Rubel
> > Subject: [gem5-users] Re: Memory Addresses in Gem5
> >
> > Hi,
> >
> > pkt->getAddr() returns memory address. pkt->print() also returns block
> > address and offset.
> >
> > Thanks
> >
> > From: ABD ALRHMAN ABO ALKHEEL via gem5-users
> > Sent: Tuesday, August 11, 2020 6:32 PM
> > To: gem5 users mailing list ; gem5-users
> >
> > Cc: ABD ALRHMAN ABO ALKHEEL
> > Subject: [gem5-users] Memory Addresses in Gem5
> >
> > Hi All,
> >
> > Does the packet in gem5 have the memory address? for example, does this
> > pkt->getAddr() return the memory address or not? If so, is that address
> > physical or virtual?
> >
> > Thanks
> >
> > [EXTERNAL EMAIL] DO NOT CLICK links or attachments unless you recognize the
> > sender and know the content is safe.
> >
> > ___
> > gem5-users mailing list -- gem5-users@gem5.org
> > To unsubscribe send an email to gem5-users-le...@gem5.org
> > %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-users] Re: Memory Addresses in Gem5
Hi Ciro,
Thanks for your email.
I added the following after CompleteDataAccess in LSQ_unit_impl to access the
memory and read data from an address.
I have two issues which are how to specify the data size (256 bytes) and get
the memory port. Any help would be appreciated.
RequestPtr req1;
PacketPtr newPkt = new Packet(req1, MemCmd::ReadReq);
newPkt->setAddr(pkt->getAddr());
cpu->getPort().sendFunctional(newPkt)
From: Ciro Santilli
Sent: Sunday, August 16, 2020 5:46 AM
To: ABD ALRHMAN ABO ALKHEEL
Cc: gem5 users mailing list ; Ahmed, Md Rubel
Subject: Re: [gem5-users] Re: Memory Addresses in Gem5
On Sat, Aug 15, 2020 at 9:54 PM ABD ALRHMAN ABO ALKHEEL
wrote:
>
> Hi Ciro,
>
> Could you tell me where can i find the file that does an ifetch for
> AtomicsimpleCPU in gem5?
>
https://github.com/gem5/gem5/blob/fa70478413e4650d0058cbfe81fd5ce362101994/src/cpu/simple/atomic.cc#L673
up to sendFetch below (find Atomic file source and grep :-) ) Some
notes also under:
https://cirosantilli.com/linux-kernel-module-cheat/#gem5-packet-vs-request
> Also, How to print the data from the packet (I assumed the loaded data is
> stored in the pkt).
> should I use
> pkt->getRaw()
> or
> pkt->getLE()
> or
> pkt->getBE()
> or
> pkt->setData()
> or
> pkt->writeData()
>
Have a look at the source under Eclipse :-) all of those get the
packet data with small variations, but it is raw binary.
To see it as hex you need to convert binary to ASCII hex first. I want
to push a simple patch for this in the near future, but you can do it
manually easily too for now:
https://stackoverflow.com/a/27173017/895245
> Thanks
>
>
> From: Ciro Santilli
> Sent: Wednesday, August 12, 2020 7:18 AM
> To: gem5 users mailing list
> Cc: Ahmed, Md Rubel ; ABD ALRHMAN ABO ALKHEEL
>
> Subject: Re: [gem5-users] Re: Memory Addresses in Gem5
>
> I recommend that you have a look at the source of how AtomicSimpleCPU
> does an ifetch under Eclipse. It should be easy to understand
> everything quickly from there.
>
> The Packet address is physical (which notably what caches and DRAM
> work on), just have a look at the constructor of packet:
>
> Packet(const RequestPtr &_req, MemCmd _cmd)
> : cmd(_cmd), id((PacketId)_req.get()), req(_req),
>data(nullptr), addr(0), _isSecure(false), size(0),
>_qosValue(0), headerDelay(0), snoopDelay(0),
>payloadDelay(0), senderState(NULL)
> {
> if (req->hasPaddr()) {
> addr = req->getPaddr();
>
> So you have to do translation before. Translation sets the physical
> address on the Request, which contains both _paddr and _vaddr fields.
>
> Another option is to have a look at how some of the memory tests are doing it.
>
> On Wed, Aug 12, 2020 at 1:55 AM ABD ALRHMAN ABO ALKHEEL via gem5-users
> wrote:
> >
> > Hi,
> >
> > Thank you for your email.
> >
> > Do you have any idea how to construct a packet with a request to read from
> > the memory address? For instance, let us assume that the address that I
> > want to read the data from it is (0x2345), I want to read the 256 bytes of
> > this address (0x2300-0x23ff)? I want to do that for debugging like this
> > https://www.gem5.org/_pages/static/scripts/part2/memoryobject/simple_memobj.cc.
> >
> > Any help would be appreciated.
> >
> > Thanks
> >
> >
> > From: Ahmed, Md Rubel via gem5-users
> > Sent: Wednesday, August 12, 2020 12:44 AM
> > To: gem5 users mailing list
> > Cc: Ahmed, Md Rubel
> > Subject: [gem5-users] Re: Memory Addresses in Gem5
> >
> > Hi,
> >
> > pkt->getAddr() returns memory address. pkt->print() also returns block
> > address and offset.
> >
> > Thanks
> >
> > From: ABD ALRHMAN ABO ALKHEEL via gem5-users
> > Sent: Tuesday, August 11, 2020 6:32 PM
> > To: gem5 users mailing list ; gem5-users
> >
> > Cc: ABD ALRHMAN ABO ALKHEEL
> > Subject: [gem5-users] Memory Addresses in Gem5
> >
> > Hi All,
> >
> > Does the packet in gem5 have the memory address? for example, does this
> > pkt->getAddr() return the memory address or not? If so, is that address
> > physical or virtual?
> >
> > Thanks
> >
> > [EXTERNAL EMAIL] DO NOT CLICK links or attachments unless you recognize the
> > sender and know the content is safe.
> >
> > ___
> > gem5-users mailing list -- gem5-users@gem5.org
> > To unsubscribe send an email to gem5-users-le...@gem5.org
> > %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
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[gem5-users] Sending more than one memory request to the memory through sendTimingReq
Hi everyone, Is it possible to send more than one memory request from the dcacheport to the memory system without stalling the pipeline. What i have seen so far is that when one memory instruction is send to the memory, then another memory request cannot be send to the memory as sendTimingReq returns boolean type false. And it has to wait until the previous memory response is back then issue the next one . My goal is to allow the MinorCPU to have overlapping memory requests to the memory, therefore is it possible to achieve this by sending more than one memory request to the memory? as I cannot figure this out. I am currently using noncoherent Xbars to connect my caches and the memory system, would I need to change it or is there something else that i have to do? Any help would be appreciated. Thanks. ___ gem5-users mailing list -- gem5-users@gem5.org To unsubscribe send an email to gem5-users-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
