[gem5-users] Re: Pseudo Instruction - m5_reset_stats() - Body Modification

Hi Jason, I have added a std::cout statement to the resetstats()'s body and I am calling m5_reset_stats from my GPU benchmarks. The GPU kernels are launched right after reset is called. I pipe the output of simulations to a file. But, strangely enough some outputs show the std::cout statements

[gem5-users] Re: Porting a configuration file from gem5 v20 to gem5 v21

Hi Ali, > -Original Message- > From: Ali Ghandour via gem5-users > Sent: 05 October 2021 15:44 > To: gem5-users@gem5.org > Cc: Ali Ghandour > Subject: [gem5-users] Re: Porting a configuration file from gem5 v20 to gem5 > v21 > > In FS mode, full errror stack below: > > Traceback (most

[gem5-users] Re: --machine-type=VExpress_EMM causing ports collision

Hi Carlos, > -Original Message- > From: Carlos Andres Lara Niño via gem5-users > Sent: 05 October 2021 17:06 > To: gem5-users@gem5.org > Cc: Carlos Andres Lara Niño > Subject: [gem5-users] --machine-type=VExpress_EMM causing ports > collision > > Hello, > I'm trying to learn gem5 and

[gem5-users] Re: Support for CAS (compare and swap) instruction in ARM arch

Thanks Mahita for spotting a real bug. I have posted a fix [1]; hopefully it will be backported to gem5 v21.1 Kind regards Giacomo [1]: https://gem5-review.googlesource.com/c/public/gem5/+/51407 > -Original Message- > From: Mahita Nagabhiru > Sent: 01 October 2021 20:07 > To: Giacomo

[gem5-users] Re: Coherent NoC with Gem5

Hi, Yes, there is. Look at the CHI protocol. It is compiled by default starting from gem5 20.0. You can find the documentation here: https://www.gem5.org/documentation/general_docs/ruby/CHI/ Other protocols are available in src/mem/ruby/protocol: MI, MSI, MESI and MOESI in different flavors.