Please take a look at util/m5/README.md for information about when the
different modes will work.
On Mon, Nov 1, 2021 at 8:14 AM Liyichao via gem5-users
wrote:
> Thanks for your reply.
>
> But when I work on the Gem5 v20.0.0.3,
> m5 —addr exit doesn‘t take effect on O3,
> and it just takes affec
Thanks for your reply.
But when I work on the Gem5 v20.0.0.3,m5 ―addr exit doesn‘t take effect on
O3,and it just takes affect on KVM in fs.
So on v21.0.1.0, how can I let the m5 exit only takes effect on KVM and does
not take effect on O3?
李翼超 Li Yichao
Mob
Hello,
The m5 magic operations (either via magic instructions or addresses) will
work with all CPU models.
Cheers,
Jason
On Sat, Oct 30, 2021 at 8:31 PM Liyichao via gem5-users
wrote:
> Hi All:
>
> Does “m5 --addr 0x1001 exit” take effect in the O3 system?
>
>
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Hi,
I recently focus on POWER ISA research. I want to restore a checkpoint and
simulate on SE mode.
But I received a prompt: fatal: Number of ISAs (1) assigned to the CPU does not
equal number of threads (2).
But the X86 ISA doesn't have this problem.
Best regards,
Tianhao