Those operands are set up in arch/arm/isa/operands.isa, and get their value using very different indices. XBase uses the "base" field of the instruction object, while XURa uses "ura". The "u" in "ura" most likely comes from the fact that that register is "register a" as intended for use in microcode. The "base" register is most likely an architecturally defined register which is encoded in or implied by the actual instruction.
On Fri, Feb 11, 2022 at 9:09 PM Jason Z via gem5-users <gem5-users@gem5.org> wrote: > Hey Pedro, > > I ran into a similar issue with naming like that with trying to create new > instructions, and the best I could tell it seems like the XUR are for > microops, but I'm honestly just guessing based on what I saw previously, > and I ended up just using XBase since I was creating a store instruction > and modeling it after an STRX64 instruction, so I tried to stick to that > framework... > > Sorry I don't have a better answer, but if anyone else has any insight to > any reference to their meanings, I'd be interested in it as well... > > Respectfully, > > Jason Z. > _______________________________________________ > gem5-users mailing list -- gem5-users@gem5.org > To unsubscribe send an email to gem5-users-le...@gem5.org > %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s >
_______________________________________________ gem5-users mailing list -- gem5-users@gem5.org To unsubscribe send an email to gem5-users-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
