[gem5-users] Documentation related to adding new cpu model to gem5

2022-06-13 Thread Jeena Samuel
Hi, Is there any documentation or videos related to adding a new cpu model to gem5 according to the latest version of gem5 in github. Thank You Jeena Samuel ___ gem5-users mailing list -- gem5-users@gem5.org To unsubscribe send an email to gem5-users-le

[gem5-users] Re: Gem5 segfaults in build/X86/cpu/o3/fetch.cc

2022-06-13 Thread Gagan Panwar
Thanks Jason. I'll take a look at gem5-stdlib. - Gagan On Mon, Jun 13, 2022 at 12:01 PM Jason Lowe-Power wrote: > Hi Gagan, > > The problem is that the CPU doesn't have an ISA object as a child. Most > likely, the function `createThreads()` wasn't called on the CPU instance. > You need to set

[gem5-users] Re: Gem5 segfaults in build/X86/cpu/o3/fetch.cc

2022-06-13 Thread Jason Lowe-Power
Hi Gagan, The problem is that the CPU doesn't have an ISA object as a child. Most likely, the function `createThreads()` wasn't called on the CPU instance. You need to set all of this up *in the python configuration*, not in the C++ models. Solving this problem is difficult if you're using the (s

[gem5-users] Re: Gem5 segfaults in build/X86/cpu/o3/fetch.cc

2022-06-13 Thread Gagan Panwar
Thank you for the reply Tom. In my case, I have been able to fix it by supplying the "decoder=ArchDecoder()" parameter to the cpu_class constructor when switch_cpus is first initialized. (Line 465 in Simulation.py) > switch_cpus = [cpu_class(switched_out=True, cpu_id=(i), decoder=ArchDecoder()) f