[gem5-users] Warning of badaddr_responder

2022-07-26 Thread larried1111
Hello,

I am creating a NUMA system with the classic memory system, in my configuration 
there are 2 domains and each one has its own memory, so there are 2 memory 
buses. The second memory bus reports a badaddr_responder warning and then 
crashes, could anyone help me to understand how the badaddr_responder works and 
what the problem is? 

The warning is:

warn: Device system.membus1.badaddr_responder accessed by read to address 0x10 
size=4

And address 0x10 is used for bootloader:

build/ARM/arch/arm/fs_workload.cc:121: info: Using bootloader at address 0x10

The full script is as follows:

./build/ARM/gem5.debug configs/numa/numa_fs.py --num_domains=2 
--num_cpus_per_domain=2 
--disk-image=$M5_PATH/disks/expanded-ubuntu-18.04-arm64-docker.img 
--kernel=$M5_PATH/binaries/vmlinux.arm64 --param 'system.sve_vl = 2' --caches 
--l2cache --num-l2caches=1 --l1d_size=32kB --l1i_size=32kB --l2_size=256kB 
--mem_size_per_domain=1GB 
--script=../arm-gem5-rsk/parsec_rcs/blackscholes_simsmall_4.rcS 
--cpu-type=TimingSimpleCPU

gem5 Simulator System.  http://gem5.org

gem5 is copyrighted software; use the --copyright option for details.

gem5 version 21.2.1.0

gem5 compiled Jul 13 2022 06:19:23

gem5 started Jul 26 2022 14:01:24

gem5 executing on zhewenhu-B360-M-AORUS-PRO, pid 4084998

command line: ./build/ARM/gem5.debug configs/numa/numa_fs.py --num_domains=2 
--num_cpus_per_domain=2 
--disk-image=/home/zhewenhu/arm/gem5/../m5_binaries/disks/expanded-ubuntu-18.04-arm64-docker.img
 --kernel=/home/zhewenhu/arm/gem5/../m5_binaries/binaries/vmlinux.arm64 --param 
'system.sve_vl = 2' --caches --l2cache --num-l2caches=1 --l1d_size=32kB 
--l1i_size=32kB --l2_size=256kB --mem_size_per_domain=1GB 
--script=../arm-gem5-rsk/parsec_rcs/blackscholes_simsmall_4.rcS 
--cpu-type=TimingSimpleCPU

512MB

domain#0.mem_ranges:

\[0x8000:0xc000\]

domain#1.mem_ranges:

\[0x28000:0x2c000\]

Global frequency set at 1 ticks per second

build/ARM/mem/mem_interface.cc:791: warn: DRAM device capacity (8192 Mbytes) 
does not match the address range assigned (1024 Mbytes)

build/ARM/mem/mem_interface.cc:791: warn: DRAM device capacity (8192 Mbytes) 
does not match the address range assigned (1024 Mbytes)

build/ARM/sim/kernel_workload.cc:46: info: kernel located at: 
/home/zhewenhu/arm/gem5/../m5_binaries/binaries/vmlinux.arm64

system.vncserver: Listening for connections on port 5900

system.terminal: Listening for connections on port 3456

system.realview.uart1.device: Listening for connections on port 3457

system.realview.uart2.device: Listening for connections on port 3458

system.realview.uart3.device: Listening for connections on port 3459

0: system.remote_gdb: listening for remote gdb on port 7000

build/ARM/arch/arm/fs_workload.cc:121: info: Using bootloader at address 0x10

build/ARM/arch/arm/fs_workload.cc:139: info: Using kernel entry physical 
address at 0x8008

build/ARM/arch/arm/linux/fs_workload.cc:96: info: Loading DTB file: 
m5out/system.dtb at address 0x8800

\*\*\*\* REAL SIMULATION \*\*\*\*

build/ARM/dev/arm/energy_ctrl.cc:252: warn: Existing EnergyCtrl, but no enabled 
DVFSHandler found.

build/ARM/sim/simulate.cc:194: info: Entering event queue @ 0.  Starting 
simulation...

build/ARM/dev/isa_fake.cc:59: warn: Device system.membus1.badaddr_responder 
accessed by read to address 0x10 size=4

build/ARM/dev/isa_fake.cc:59: warn: Device system.membus1.badaddr_responder 
accessed by read to address 0x10 size=4

gem5.debug: build/ARM/cpu/simple/timing.cc:829: void 
gem5::TimingSimpleCPU::completeIfetch(gem5::PacketPtr): Assertion \`!pkt || 
!pkt->isError()' failed.

Program aborted at tick 133500

\--- BEGIN LIBC BACKTRACE ---

./build/ARM/gem5.debug(+0x1203742)\[0x5617e358c742\]

./build/ARM/gem5.debug(+0x12244c6)\[0x5617e35ad4c6\]

/lib/x86_64-linux-gnu/libpthread.so.0(+0x14420)\[0x7f7e82214420\]

/lib/x86_64-linux-gnu/libc.so.6(gsignal+0xcb)\[0x7f7e813ba00b\]

/lib/x86_64-linux-gnu/libc.so.6(abort+0x12b)\[0x7f7e81399859\]

/lib/x86_64-linux-gnu/libc.so.6(+0x22729)\[0x7f7e81399729\]

/lib/x86_64-linux-gnu/libc.so.6(+0x33fd6)\[0x7f7e813aafd6\]

./build/ARM/gem5.debug(+0x10f6225)\[0x5617e347f225\]

./build/ARM/gem5.debug(+0x10f68e5)\[0x5617e347f8e5\]

./build/ARM/gem5.debug(+0x1212d96)\[0x5617e359bd96\]

./build/ARM/gem5.debug(+0x123ee6b)\[0x5617e35c7e6b\]

./build/ARM/gem5.debug(+0x123ea42)\[0x5617e35c7a42\]

./build/ARM/gem5.debug(+0xf94730)\[0x5617e331d730\]

./build/ARM/gem5.debug(+0xf92b06)\[0x5617e331bb06\]

./build/ARM/gem5.debug(+0xf8ee75)\[0x5617e3317e75\]

./build/ARM/gem5.debug(+0xf8eee0)\[0x5617e3317ee0\]

./build/ARM/gem5.debug(+0xb64dbc)\[0x5617e2eeddbc\]

/lib/x86_64-linux-gnu/libpython3.8.so.1.0(+0x2a8738)\[0x7f7e824cb738\]

/lib/x86_64-linux-gnu/libpython3.8.so.1.0(_PyEval_EvalFrameDefault+0x8dd8)\[0x7f7e822a0f48\]

/lib/x86_64-linux-gnu/libpython3.8.so.1.0(_PyEval_EvalCodeWithName+0x8fb)\[0x7f7e823ede3b\]


[gem5-users] Re: Support of SSE, MMX, X87, CMOV in gem5

2022-07-26 Thread Jason Lowe-Power
Hello,

We support some of those instructions, but not all of them. I suggest
running your workloads and watching out for unimplemented instruction
warnings.

Cheers,
Jason

On Mon, Jul 25, 2022 at 11:08 PM Abdelrahman S. Hussein <
abdelrahman.sob...@gmail.com> wrote:

> Hello,
>
> I am trying to run SPEC OMP 2012 in Full System mode on gem5. When I try
> to run it, I get the following error:
>
> Please verify that both the operating system and the processor support
>> Intel(R) X87, CMOV, MMX, FXSAVE, SSE, SSE2, SSE3, SSSE3, SSE4_1, SSE4_2 and
>> POPCNT instructions.
>>
>
> The image has Ubuntu 18 and the kernel is vmlinux-5.4.49 downloaded from
> gem5 website. CPU is AtomicCPU and all the implementation is for x86.
>
> My question is: does gem5 support the above Intel extensions  for SIMD and
> Vectorization? I tried to look into the gem5 resources, but I couldn't find
> something clear on this.
>
> Thanks!
>
> --
>
> *Best,Abdelrahman Hussein*
> MSc. Student -- Graduate RA/TA
> School of Computing Sciences
> Simon Fraser University, Canada
> --
>
> --
>
> *Best,Abdelrahman Hussein*
> MSc. Student -- Graduate RA/TA
> School of Computing Sciences
> Simon Fraser University, Canada
> ___
> gem5-users mailing list -- gem5-users@gem5.org
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>
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[gem5-users] Re: Running gem5 with DRAMsim3

2022-07-26 Thread Thomas Copper
Oh, thanks all the same.

On Mon, Jul 25, 2022 at 11:21 PM Jason Lowe-Power 
wrote:

> Hello,
>
> We can only support the official gem5 repository found at
> https://gem5.googlesource.com/. You can find the information on how to
> use DRAMSim3 in the README
> https://gem5.googlesource.com/public/gem5/+/refs/heads/stable/ext/dramsim3/README
>
> Cheers,
> Jason
>
> On Sat, Jul 23, 2022 at 9:49 AM Thomas Copper 
> wrote:
>
>> Hi, Mahyar, what if I am using gem5 version in this url:
>> https://github.com/umd-memsys/gem5 ?
>> How can I integrate dramsim3 and gem5 together?
>> ___
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>>
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[gem5-users] Support of SSE, MMX, X87, CMOV in gem5

2022-07-26 Thread Abdelrahman S. Hussein
Hello,

I am trying to run SPEC OMP 2012 in Full System mode on gem5. When I try to
run it, I get the following error:

Please verify that both the operating system and the processor support
> Intel(R) X87, CMOV, MMX, FXSAVE, SSE, SSE2, SSE3, SSSE3, SSE4_1, SSE4_2 and
> POPCNT instructions.
>

The image has Ubuntu 18 and the kernel is vmlinux-5.4.49 downloaded from
gem5 website. CPU is AtomicCPU and all the implementation is for x86.

My question is: does gem5 support the above Intel extensions  for SIMD and
Vectorization? I tried to look into the gem5 resources, but I couldn't find
something clear on this.

Thanks!

--

*Best,Abdelrahman Hussein*
MSc. Student -- Graduate RA/TA
School of Computing Sciences
Simon Fraser University, Canada
-- 

--

*Best,Abdelrahman Hussein*
MSc. Student -- Graduate RA/TA
School of Computing Sciences
Simon Fraser University, Canada
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