[gem5-users] [GEM5] Executing same workload by different cores in SE mode

Hi everyone, I'm trying to run same workload by multi cores in SE mode in order to test some cache coherence issues. (Using risc-v core) For example, I add a process to cpu[0] by using "system.cpu[0].workload = process". It works, cpu[0] will run the workload correctly in the simulation. Then I

[gem5-users] Re: [GEM5] Executing same workload by different cores in SE mode

want to test cache coherence, you might want to run a multi-threaded program that has shared data accessed by different threads mapped to different cores. Best, Jiayi On Thu, Jun 16, 2022 at 4:23 PM Peng, Ziyang mailto:ziyang.p...@intel.com>> wrote: Hi everyone, I’m trying to run same wo

[gem5-users] Using Ruby memory system with systemc model

Hello, I am doing some tests on both Ruby memory system and systemc interface in gem5. I wonder if it is possible to combine them together? A simple system like: gem5 core <-> RUBY(CHI best) <-> Memory ( in systemc ). Thanks + regards, Ziyang ___

[gem5-users] A stupid question with SConstruct

Hi all, I used default SConstruct file to build gem5 before. It works well. But when I try to modify it(e.g. change "-std=c++17" to "-std=c++20"), a confusing error happened. It told me that "Error: Can't find a working Python installation". The command I used and the out put as follows: $ >

[gem5-users] gem5-systemc builidng error

Hi， I am a new to gem5 and want to do some research on SystemC co-simulation. I get the code from https://github.com/gem5/gem5, follow the steps the README both in /util/tlm and /util/systemc and get quite a lot building error likes xxx should be gem5::xxx or gem5::yyy should be yyy. After

[gem5-users] Failed to run tlm-gem5 cosimualtion examples in util/tlm

Hi, I am working on combine external sc_models to Gem5. So I try to follow the tlm tutorial in gem5/util/tlm/README. Following the building steps in the REDME file, there is no issue on the first two line and end with normal gem5.opt output: >cd ../../ >/usr/bin/env python3 `which scons`

[gem5-users] Multi-threaded program in Gem5 SE mode

Hi all, Earlier this month, I saw an email saying that Gem5 SE mode already supports multi-threaded program. I tested both ARM and X86 program. X86 works well but the ARM one will report below errors when deleting threads(maybe?). build/ARM/sim/syscall_emul.cc:74: warn: ignoring syscall

[gem5-users] Create the gem5 required config file without using gem5 binary?

Hi all, Since gem5 is using python scripts to create configuration files. Is there any way to create the configuration file without using the binary like gem5.opt or gem5.fast? Maybe a pure python method or a C++ interface like CXXConfig ? Thanks + regards, Ziyang

[gem5-users] Building gem5 in virtual python environment

Hi guys, I was working on building gem5 with miniconda python. The building crashed with "Error: Can't find a working Python installation". After searching online, I found that this is a common problem, but there is no accurate solution. Here is my local solution: 1. Add this line in

[gem5-users] Config ARM DSU in Gem5 simulator

Hi all, I am a Gem5 user currently studying with the ARM architecture. In ARM, there is a DSU(DyanamIQ Shared Unit) comprises the L3 memory system, control logic, and external interfaces to support

[gem5-users] Re: Assistance required: Stats not generated for TLM examples

Hi PaiJ, Is the stats.txt file in m5out folder is empty? If yes, I think the root cause is that gem5-tlm is using cxx_manager class to register each objects while the registering of stat is missing. My solution is adding a new method at CxxConfigManager::instantiate(bool build_all){} . This

[gem5-users] Question about ARM DVFS support

Hi all, I found Gem5 provides DVFS support for ARM. The doc introduce how to enable it in the FS mode but not clearly about how it works. From my study with the Gem5 source code, energy_ctrl will call DVFS to change the