This is one of the things I've never had the patience to figure out, some ideas:
* investigate in QEMU first as it is much faster
* look into busybox's init code
From: Chao Fu via gem5-users
Sent: Wednesday, November 4, 2020 3:12 PM
Yes, I had also previously observed that debug symbols make the huge majority
of the executable's size, and for some reason much more so in .opt than in
debug (presumably it takes more information to map back optimized code to
You can confirm that by using strip gem5.opt or gcc- s
Daniel, if you manage to reproduce on clean develop, please also open an issue
at https://gem5.atlassian.net/jira/software/c/projects/GEM5/issues I'd also be
curious to see if it reproduces on se.py (so I could see if it also happens on
We've had some ARM-specific SE issues e.g. at
BTW I pushed a patch exposing m5_exit_addr at:
And after that this should work on KVM
From: Gabe Black via gem5-users
I have m5_exit working on a C program at
but now I wanted to create one using the memory address version.
We already have a m5_exit_addr symbol defined in the library, but I couldn't
On full system you can also try to instrument the syscall function symbol, we
do something analogous for panic detection:
From: ABD ALRHMAN ABO
Have you tried:
or has something changed since then too? Seems to work on develop just now.
From: wqyin--- via gem5-users
Sent: Sunday, October 25, 2020 7:36 PM
One thing to try, that program looks like it needs --num-cpus=5 as it spawns 4
threads (so main + 4 total).
From: Bobby Bruce via gem5-users
Sent: Thursday, October 15, 2020 10:13 PM
To: gem5 users mailing list
Cc: Farhad Yusufali ; Bobby Bruce
* as for Jason's website, he is the sole moderator there, and can freely
delete any comments as he sees fit
On Sat, Oct 3, 2020 at 7:08 AM Ciro Santilli
> The gem5 PMC cannot control Stack Overflow and GItHub accounts of its
> If you want those avatars cha
e can reproduce the problem :).
>>> 4. The gem5 project has a code of conduct (
>>> Specifically it says our standards include "Demonstrating empathy and
>>> kindness towa
Can you provide the URL at which the avatar you refer to is showing?
On Fri, Oct 2, 2020 at 6:55 AM 1154063264--- via gem5-users
> First of all, I thank him for answering my question. However, as a Chinese,
> his profile picture does not respect our country. If my behavior affects
Please provide fuller reproduction details.
On Thu, Oct 1, 2020 at 8:39 AM 1154063264--- via gem5-users
> I am trying to run parsec in MESI_Three_Level-gem5.opt for ARM architecture
> in FS mode, but I am getting a segmentation fault.
> info: Entering event queue @ 25592214185500.
Also have a look at --debug-flags SyscallBase,SyscallVerbose
On Tue, Sep 22, 2020 at 8:26 PM ABD ALRHMAN ABO ALKHEEL via gem5-users
> Hi All, can I track the read()/write() system calls in GEM5 in SE mode? If
> so, how I can do that? Any help would be appreciated. Thanks
This gives some pointers on the SimObject Python/C++ interaction which
might clarify things:
On Tue, Aug 25, 2020 at 2:21 PM Dwaipayan Ray via gem5-users
> Hello Everyone,
> I am very
I'm not sure about the cache hierarchy issue.
But about Ruby support, I don't think there's any known ARM specific problem,
and ARM contributors have been specifically pushing Ruby recently, see e.g. see
Tiago's CHI announcement: https://www.gem5.org/2020/05/29/flexible-cache.html
Functional reads in Ruby SE are a known and hard to solve problem, see
On Tue, Aug 18, 2020 at 6:33 PM VIPIN PATEL via gem5-users
> Hi All,
> I using the GEM5 simulator to collect statistics of a
need to convert binary to ASCII hex first. I want
to push a simple patch for this in the near future, but you can do it
manually easily too for now:
> From: Ciro Santilli
> Sent: Wednesday, August 12, 2020
On Sat, Aug 15, 2020 at 6:44 PM Chandrahas Tirumalasetty via
> I am trying to restore from a checkpoint (created with AtomicSimpleCPU) with
> cpu-type DerivO3CPU in my gem5 setup. I have two questions mainly
> Is it allowed to create a checkpoint with
I recommend that you have a look at the source of how AtomicSimpleCPU
does an ifetch under Eclipse. It should be easy to understand
everything quickly from there.
The Packet address is physical (which notably what caches and DRAM
work on), just have a look at the constructor of packet:
: Tuesday, August 11, 2020 11:37 AM
To: email@example.com ; Ciro Santilli
Subject: Re: [gem5-users] Error only occurs with higher number of clusters and
The error seems to relate to the kernel used. I build a new kernel (gem5:
How are you counting the instructions? --debug-flags ExecAll? If so, are you
excluding pseudo instructions with --debug-flags ExecAll,ExecMicro?
From: Liyichao via gem5-users
Sent: Monday, August 10, 2020 5:29 AM
It might be the same as: https://gem5.atlassian.net/browse/GEM5-711 I want to
investigate that soon hopefully.
If you try Ruby and it fails, please open a separate bug, we want it to work as
From: Sebastian Block via gem5-users
Sent: Friday, August 7,
Does it crash immediately? If so, provide to us and look at the
backtrace to try and determine which allocation fails. If that doesn't
help, you can also try techniques mentioned at:
Welcome back Nathanael!
We put great importance on ARM Linux kernel boot, and we try to make it so that
it either works or at least we have a bug report for it.
I reproduce the problem with VExpress_GEM5_V2 but not VExpress_GEM5_V1, opening
a but for V2 at:
Hi, is this different from:
https://firstname.lastname@example.org/msg18093.html If not,
please don't repost so soon, and ping previous thread instead. I'm
preparing to learn/ask around if no one replies.
On Sun, Jul 26, 2020 at 9:08 AM faridehziaee via gem5-users
Why wouldn't it work :-)? Have you tried/how it fails? How did
execution terminate Ctrl + C or a guest event?
On Sat, Jul 25, 2020 at 7:13 AM as3mx--- via gem5-users
> I wanted to know if it is possible to resume the checkpoint generation from
> the last checkpoint generated.
To compile kernel see e.g.:
but replace arm with arm64 and the compile with the aarch64 one for 64-bit
arm. All other ISAs are analogous.
The ARM configs are in-tree of the official arm gem5
On Mon, Jul 20, 2020 at 12:25 PM Muhammad Aamir via gem5-users
> Hi everyone,
> I have been following this
SE I suppose? It seems that the benchmark ends normally with an exit
syscall, I would start by looking at --debug-flags SyscallBase to
double check that.
Then if that is the case, the only explanation is that some value is
getting corrupted somewhere due to a gem5 bug. So I would try to: 1)
On Fri, Jul 10, 2020 at 1:44 AM Aditya Narayan via gem5-users
> I am running into issues when using the script "hack_back_ckpt.rcS" to create
One option might be to --debug-flags Registers and look up to latest
register modification. See also --debug-help.
On Thu, Jul 9, 2020 at 6:19 PM Shougang Yuan via gem5-users
> Hi, All,
> I want to dump out the source register and destination register value of each
I'm not aware of this, please provide further reproduction details on JIRA
(which kernel, full gem5 CLIs, gem5 git version) and we'll have a look.
From: Choe, Jiwon via gem5-users
Sent: Wednesday, July 8, 2020 5:35 PM
To: gem5 users mailing list
Cc: Choe, Jiwon
Shehab, sorry for the delay, I had to check a few things about this,
First, are you aware that there is a not-yet-merged patch that implements a two
level TLB at:
It hasn't been merged because we noticed that it
Also, in ARM more specifically, you can see miscregs at
Most are what the ARM manuals call "System Registers", but a few
others are just convenient ways to implement other ISA features like
Forwarding reply to mailing list.
-- Forwarded message -
From: Anuj Falcon
Date: Fri, Jul 3, 2020 at 8:05 AM
Subject: Re: [gem5-users] How to check ...
To: Ciro Santilli
Below is the link to the GEM5 model. (Public)
Describe your model briefly here/discuss on a review request if you
already have code? :-)
On Thu, Jul 2, 2020 at 11:39 PM Anuj Falcon via gem5-users
> How to know if my CPU model qualifies to be upstreamed with the rest of the
> CPU models in gem 5 ?
I'm not sure about the TLB part, but
configs/example/arm/fs_bigLITTLE.py in tree already showcases two
types of cores and is maintained, so maybe you can take that as a
starting point and see how TLBs are attached and modify that for one
of the set of cores.
On Fri, Jun 26, 2020 at 11:31 PM Choe,
", and I check the options.py file in the configs/common
> directory, it seems that this option has been deprecated? Or is there
> anything I misunderstand?
> Best regards.
> On Tue, Jun 9, 2020 at 10:40 AM Ciro Santilli wrote:
out redirect /lib64 or that directory? I
> can understand syslink the needed shared library into a directory, and after
> that, you mean I need to redirect the lib64 to this directory or?
> Best regards.
> On Tue, Jun 9, 2020 at 2:36 AM Ciro Santilli wro
One thing to try if you are desperate: symlink every needed shared
library into a directory, and then redirect /lib64 or that directory.
I'm pretty sure this should work.
I'm not sure why LD_LIBRARY_PATH does not work. I would dig dieeper
and try to understand that, theoretically it feels like it
OK, the previous --redirects idea makes no sense, nevermind, I wish I
could edit emails.
On Mon, Jun 8, 2020 at 4:39 PM Ciro Santilli wrote:
> --redirects can be used multiple times. But not 100% sure it will be
> able to replace LD_LIBRARY_PATH. Just one thing worth trying along
option. but the error is still can
> not find this lib. Do you have any hints about this?
> Best regards.
> On Mon, Jun 8, 2020 at 10:42 AM Ciro Santilli wrote:
>> Have you tried --redirects as mentioned at
--env option with myse.py, but it
> still shows the same error.
> On Mon, Jun 8, 2020 at 3:39 AM Ciro Santilli wrote:
>> Syscall emulation or full system?
>> On Sun, Jun 7, 2020 at 10:01 PM Shougang Yuan via gem5-users
Syscall emulation or full system?
On Sun, Jun 7, 2020 at 10:01 PM Shougang Yuan via gem5-users
> HI, All,
> I am trying to run some benchmarks that need some shared libs, and these
> shared libs are imported by setting the environment variables
> "LD_LIBRARY_PATH" if I run it on
Are you mounting and modifying the disk on the host while gem5 is
using it at the same time? That likey cannot work because the Linux
kernel representation of guest and host will differ. Also gem5 does
not write back to disk.
The file sharing mechanisms I know to modify guest visible files from
It does look like your host's library is not compatible with whatever
was used to compile that C hello world.
You can't in general download and run dynamically linked programs
built for other toolchains, you either have to build it yourself
(often the easiest thing to do) or somehow obtain a
Maybe you want to look into: m5 readfile, 9P or use two disks as
On Sun, May 17, 2020 at 9:20 PM HENG ZHUO via gem5-users
> I am trying to run some benchmark on ARM full system simulation.
There is no stupid question around here, ask away :-)
On Wed, May 6, 2020 at 10:33 PM Øivind Harket Bakke via gem5-users
> Dear Santilli,
> that fixed everything except my embarrassment.
> Thank you very much, really appriciated!
> Best regards,
Maybe did you mean to use -ExecMicro to remove microops rather than
-ExecMacro? E.g. one STP generates 4 microops as shown at:
On Wed, May 6, 2020 at 8:54 PM Øivind Harket Bakke via gem5-users
> Hi all,
OK, also quick grep in kernel code and we can see that -8 and -13 are
the same as exec syscall error numbers:
#define ENOEXEC 8 /* Exec format error */
#define EACCES 13 /* Permission denied */
not 100% sure what those mean, but worth looking into as well.
On Sat, Apr 25, 2020 at 7:13 PM Ciro
No worries. I would mount the image on host and ensure that the init
you think is there is actually there, and that it seems to be right
filetype (ISA is ARM, is executable, etc.). And ensure that you are
pointing to it with init= kernel CLI parameter. If you don't
understand from that, GDB step
You could download from:
section "Latest Linux Disk Images (recommended)"
Personally I normally use Buildroot:
Can you also try to use the full path to vmlinux.arm64 instead of just
basename? I suspect it is currently searching for it on M5_PATH
(because not slashes in the path) and finding some broken image there.
Better still, get rid of M5_PATH altogether if possible.
My full non minimized CLI with
I don't know exactly what is going on, but I've tested
aarch-system-201901106/binaries/vmlinux.arm64 in fs.py and it worked
So the exact same script works with the old kernel but not new one?
Are you sure that the kernel exists at that path? Also try to GDB/PDB
debug it a bit.
On Sat, Apr
It is the easiest method. I think it boots QEMU, mounts the image, and
does the resizing operations for you.
You may need to add sudo to commands due to this bug:
(val >>> 8);
> bytes = (byte) (val >>> 0);
> return bytes;
> Maybe type inversion to/from long incurs floating-point instructions that are
> not implemented in Gem5, which results in YCSB errors.
> Is there any way I can solve this problem? - Is there any
You have to try and debug it further to narrow down the exact
operation gem5 seems to be doing wrong (--debug-flags ExecAll, GDB
This could be easy to spot, or extremely difficult if the divergence
happened way earlier in execution before the crash, but I don't see an
> On Thu, Apr 9, 2020 at 8:59 PM Ciro Santilli wrote:
>> Can you double check with aarch64-linux-gnu-objdump that the binary
>> really only contains a single pseudoop? Maybe it is just an
>> instrumentation bug that doubles it up.
Can you double check with aarch64-linux-gnu-objdump that the binary
really only contains a single pseudoop? Maybe it is just an
instrumentation bug that doubles it up.
I would also recommend that you try to correlate --debug-flags ExecAll
or GDB the guest executable around the pseudoop point to
On Thu, Apr 9, 2020 at 6:29 PM Ajumal P A wrote:
> Hi All,
> I have a couple of doubts about how the event queue works and how stats are
> being calculated. Please help me with the following questions.
> I have a loop which runs for 100 times, each iteration do an add operation
> and this
Thanks for this Shehab,
Could you compare your changes to this patchset:
On Thu, Apr 9, 2020 at 6:22 PM Shehab Elsayed wrote:
> Hello All,
> I was running some experiments and I ran into a problem with ruby where a
There is an implemented syscall (setgid), you have to either implement
it, or ignore it (grep and modify the source there are many already
ignored) if that is not likely to matter. See also:
On Thu, Apr 9, 2020 at 2:02 AM
Try to trace it down to a more specific instruction with --debug-flags
ExecAll. Also give us full gem5 CLI.
On Wed, Apr 8, 2020 at 10:35 AM swamy saranam
> Hi everyone,
> I am trying to setup SPEC CPU 2017 workloads in gem5 SE mode. When I try to
> run 603.bwaves and 631.deepsjeng, I
I would suggest that you try to run it on QEMU as well where things
will go much faster and to try and that will potentially decide if it
is a gem5 bug or not if it woks on QEMU.
Then if it does not work on QEMU either, try extracting the init
problem from gem5 and asking on a community that
2020 3:46:07 AM
> *To:* gem5 users mailing list ; Ciro Santilli <
> ciro.santi...@arm.com>; Ciro Santilli
> *Subject:* Re: [gem5-users] Gem5 crash when i use --cpu-type=DerivO3CPU
> Hi Ciro,
> I have compiled the following repository using *make *command to work on
Since this a common question, I've decided to start a Q at:
to centralize knowledge about the issue.
If any more experienced user can add or correct anything
BTW, ARM checkpointing seemed completely broken on latest develop when
I tried it, opened a bug at:
On Thu, Mar 26, 2020 at 8:39 AM Ciro Santilli wrote:
> What's the error message?
> On Thu, Mar 26, 2020 at 6:31 AM ABD ALRHMAN ABO ALKH
What's the error message?
On Thu, Mar 26, 2020 at 6:31 AM ABD ALRHMAN ABO ALKHEEL
> Hi All,
> I run the following command to take checkpoint and it works well. But when i
> use --cpu-type=DerivO3CPU instead of AtomicSimpleCPU the system crash. I
> want DerivO3CPU as cpu type.
I would try to put prints/PDB on src/python/m5/stats/__init__.py where
enable is called.
On Wed, Mar 25, 2020 at 5:35 AM Subhankar Pal wrote:
> I am trying to run simulations in SE mode with a 1000+ (simple) cores. I get
> the following error once m5.instantiate() is called.
You have to either fully boot Android on fs.py or find some userland
setup which I don't know about for SE.
I don't have a fully automated Android boot setup, so just try it out
and tell if it fails and how.
For plain Java, it is much more likely that you will be able to run in
SE: but will
This information may also be of interest:
On Fri, Mar 20, 2020 at 5:33 AM Armand Behroozi wrote:
> Thank you so much! Will take a look.
> Also wanted to thank you for your tutorials and learning_gem5 code.
> My research would not be
Please give us stack trace (GDB it if none), full gem5 CLI, gem5 git version,
as much detail as possible about content, and ensure you have
https://gem5-review.googlesource.com/c/public/gem5/+/22283/4 ideally on a bug
report at: https://gem5-review.googlesource.com/c/public/gem5/+/22283/4
One Buildroot option:
On Mon, Mar 2, 2020 at 5:50 PM FARIDEH ZIAEE wrote:
> I need to run spec cpu
boots Buildroot (not Ubuntu) to shell in about 4 minutes on a P51
With Ubuntu, I would use my own
And this is a Buildroot setup tested on ARM and X86:
On Wed, Feb 26, 2020 at 6:31 AM niranjan soundararajan
> Has anyone got a recent Linux kernel (Ubuntu 18.0.4) for GEM5 working
*From:* Ciro Santilli
*Sent:* Friday, February 21, 2020 2:10:48 PM
*To:* gem5 users mailing list ; ABD ALRHMAN ABO
ALKHEEL ; gem5-users
*Subject:* Re: [gem5-users] Fw: Asim benchmarks on gem5
I'm afraid I don't have a super automated setup
I observe the following behavior on se.py ARM and X86, which depends on
--restore-with-cpu. I have used a minimal userland executable that only
does two things in assembly: m5 checkpoint and m5 exit (total of only 5
instructions in aarch64)
@Jason: can you confirm the difference between se.py
I'm afraid I don't have a super automated setup that just works for
Android, and haven't done this myself specifically, but here are some
- those instructions are like large part of the wiki old and may have
stopped working --machine-type=VExpress_EMM is not recommended anymore,
A bit more precisely, every fork syscall starts on a new free CPU. If
there are no new free CPUs, the call fails in the guest. Once the
thread ends, the CPU is freed and becomes available for new threads.
Also mentioned at:
"I started using ruby memory model after reading from gem5 email
archive that classic memory does not work with multicore DerivO3CPU.":
I didn't know this, where was this mentioned? I have just run an ARM
pthread hello world on DerivO3CPU 2 cores and it worked on master.
Please don't cross post on dev/user as it can divide discussion.
On Fri, Feb 14, 2020 at 3:32 AM Daniel Gerzhoy wrote:
> Hi all,
> I've added a series of DPRINTFs into the coherence protocol (GPU_VIPER)
> and its been working ok, up until this morning when I added a bunch all at
> once and
I have managed to get it working recently without any patches as
If that doesn't solve the problem for you, let me know.
On 2/7/20 2:38
Full system or syscall emulation? Always give full gem5 CLI :-)
If syscall emulation and the binary is dynamically linked, try to
produce a statically linked version of it, since this seems dynamic
On 2/10/20 3:30 PM, 616653241 wrote:
ï¿½ ï¿½ I was running
Give us the backtrace.
On Sat, Jan 18, 2020 at 1:34 PM DURAIRAJ J <2016506...@annauniv.edu.in> wrote:
> I have encountered a segmentation fault in gem5, by running the following
> "./build/X86/gem5.debug ./configs/example/garnet_synth_traffic.py --ruby
You could hack up custom m5op magic instructions easily by copying
existing ones, but I think it still takes up a memory fetch/decode.
Better than that, only if you hack a way to do something when a given
PC is reached. Maybe have a look at how Linux detects panics by
reading the PC of the panic
iro, I appreciate your help. Can you provide me an example on .rcs
> script to run the benchmark. Any help would be appreciated. Best Regards
> From: Ciro Santilli
> Sent: Thursday, January 9, 2020 9:52:28 AM
> To: gem5 users mailing list ; a
1. get Linux to boot, e.g.:
2. learn to checkpoint at the end of boot, restore, and run an
executable afterwards, e.g.:
On Wed, Jan 8, 2020 at 2:33 AM ABD ALRHMAN ABO ALKHEEL
> Hi All,
> I run this command and i got the below error. Any help would be appreciated.
On Mon, Jan 6, 2020 at 4:09 PM Shehab Elsayed wrote:
> Hello All,
> I was wondering which configuration parameters are safe to change between
> taking a checkpoint and restoring from the same checkpoint. For example,
> cache configuration, core configuration, number of LLC banks, number of
Also consider this working setup:
./build --arch aarch64 --download-dependencies gem5-buildroot
./run --arch aarch64 --emulator gem5
On Sat, Jan 4,
An overview of CPU models can be found at:
- O3_ARM_v7a was created in 2012, but not by ARM Holding directly.
Cortex-R8 is from 2016. There is no ARM holding O3 particularization
currently, so it is very
here is an alternate automated setup that I have tested:
On Thu, Dec 5, 2019 at 4:05 AM 闫亮 wrote:
> Hi all,
> I am trying to use full_system simulation in gem5 and
On 12/10/19 3:25 AM, Eliot Moss wrote:
> On 12/6/2019 4:56 AM, 闫亮 wrote:
>> Hi all,
>> I am new to the gem5, I want to run a CNN model write in Python by
>> gem5. What I learned so far is we usually run the compiled C/C++
>> program in full system simulation. How about run a python program,
On 12/11/19 4:36 AM, DURAIRAJ J wrote:
> I have used Parsec benchmarks for mapping application on to the
> simulated network in gem5 simulator.
> Does anyone know how to specify our own task to core mapping algorithm
> and also where to place that algorithm (i.e) the directory of where
Related question yet without satisfactory answer:
Maybe we can use the new --redirects option to get this working, not
Thanks for the detailed report.
I don't think there is any advantage of using the pthread library currently, at
least on ARM.
I reproduce on e96ccec8159f91d60bed8342184fb969b06eaf4f Ubuntu 19.04, but only
Without Ruby and everything else the same, it works.
On Tue, Nov 12, 2019 at 7:26 AM Javed Osmany
> I wanted to experiment with enabling/disabling the existing stats in GEM5
> before I start delving into adding stats.
> I am assuming that all the stats implemented are enabled by default.
> What would be the simplest
On 11/7/19 2:28 PM, yuan wrote:
> Hi, All,
> I suffered one problem of multiple definition when compiling, what I did
> is adding some new functions I need in a file name my_func.hh under
> src/mem/, and in the file cache.cc where I need these functions I use
> #include “mem/my_func.hh”,
On 11/6/19 12:05 PM, Nitish Srivastava wrote:
> I am trying to run some benchmarks in gem5. These benchmarks have really
> big matrices stored as global arrays. While simulating it seems like
> gem5 is taking a lot of time to just load these global matrices i.e. the
> time difference
On Mon, Nov 4, 2019 at 8:09 PM Andreas Brokalakis wrote:
> Hi all,
> I am trying to compile gem5 cloned from the official repository on Ubuntu
> 19.10 with gcc 9.2.1 installed. I keep on getting errors that make
> practically the compilation process impossible.
> The first errors were
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