[gem5-users] Use of std::ostream in OutputStream class

[Scott Blankenberg via gem5-users]

Hello all,

I have a question about the _stream variable of the OutputStream 
class(base/output.hh, base/output.cc)

I had a question about the variable definition.
std::ostream *const _stream;

Why do we use std::ostream vs std::ofstream? 

The reason I am asking is because I cannot seem to find close method for 
std::ostream while for std::ofstream there is a close method.

Let us look at the following example of a stream in BaseCPU

In src/cpu/base.cc
 functionTraceStream = simout.findOrCreate(fname)->stream();

In src/cpu/base.hh
std::ostream *functionTraceStream;

I cannot find any code in src/cpu/base.cc which closes the stream. Is there a 
reason for this? 

I would have expected to see a call to something like this somewhere in 
src/cpu/base.cc:
 void OutputDirectory::close(OutputStream *file)


Right now I am using this close method for the streams I am creating. In this 
case, I need to make sure I capture the OutputStream pointer in order to use 
the OutputDirectory::close method. Thus I do something like:

OutputStream *testStreamContainer = simout.findOrCreate(fname);
std::ostream *testStream = testStreamContainer->stream();

simout.close(testStreamContainer);

I assume this should close the stream correctly? Does anyone have any comments 
or have they done something similar?

Thanks,

Scott Blankenberg
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[gem5-users] Re: findOrCreate function

[Scott Blankenberg via gem5-users]

Hello Jason,

Following the example in the elastic trace code seems to work for me.

Thanks
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[gem5-users] findOrCreate function

[Scott Blankenberg via gem5-users]

Hello all,

Has anyone used the findOrCreate Gem5 function for opening custom file streams?

For example in src/cpu/base.cc we see that this function is used in the 
constructor for BaseCPU

  const std::string fname = csprintf("ftrace.%s", name());
  functionTraceStream = simout.findOrCreate(fname)->stream();


Has anyone who has used this function called it to create .gz files?

I am having an issue right now where for some benchmarks I run that the final 
gz file I get out is not compressed correctly. When I attempt to decompress the 
.gz files, I will get errors such as "unexpected end of file". 

One possibility I can think of is that the file does not close properly. 
However, I am struggling to find out where I should close the file since I need 
to do it at the end of the simulation and there is no clear place in BaseCPU 
code to place code you want to execute at the end of simulation. I have tried 
using the BaseCPU destructor to close my stream files, but the code I put into 
this destructor does not seemed to be invoked.

Anyways, has anyone ran into similar issues?

Thanks,

Scott Blankenberg
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[gem5-users] Destructor for BaseCPU

[Scott Blankenberg via gem5-users]

Hello, 

In src/cpu/base.cc we have the following destructor:

BaseCPU::~BaseCPU()
{
}

By default nothing is inside of it. However, when I put code inside, it does 
not seem to be executed at any point. Based on some previous threads I have 
seen on the forums, it seems that the destructor for BaseCPU is not being 
called at the end of the simulation.

Has anyone found a way to make sure this destructor is called when the 
simulation ends?

Similarly, has anyone written a tracer which is a subclass of InstTracer that 
has a destructor which is successfully called at the end of simulation? 

Basically my objective is to make sure the destructor to my customTracer is 
called at the end of the simulation.

Thanks,

Scott Blankenberg
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[gem5-users] O3CPU Branch Predictor Similation

[Scott Blankenberg via gem5-users]

Dear all,

I looked at fetch.cc for the O3CPU and in particular looked at the function 
which calls the branch predictor.


bool Fetch::lookupAndUpdateNextPC(const DynInstPtr , TheISA::PCState 
)

Here are the first couple of lines for quick reference:

bool predict_taken;

if (!inst->isControl()) {
inst->staticInst->advancePC(nextPC);
inst->setPredTarg(nextPC);
inst->setPredTaken(false);
return false;
}

ThreadID tid = inst->threadNumber;
predict_taken = branchPred->predict(inst->staticInst, inst->seqNum,
nextPC, tid);

In the above code there is first a check to see whether or not the current 
instruction is a control instruction. If it is not, predict taken = false and 
the function returns. 

Otherwise, if the current instruction is a control instruction, then the branch 
predictor is used for the prediction. 

Here is my question. How is it valid to assume that we already know whether or 
not the instruction is a control instruction before it is put into the branch 
predictor? In other words, does this model of branch prediction implied by the 
code bypass the issue of ghost branches(predicting that non-branch instruction 
addresses correspond to taken branches)? 

One thought I did have was that the branch predictor BTB can filter out the 
non-conditional instructions since I assume the BTB will ideally not contain 
entries which correspond to non-conditional instructions. Thus, in principle, 
if a non-conditional instruction is encountered, even if the branch predictor 
predicts the direction to be taken, the instruction will not hit in the BTB and 
the overall prediction will be not taken. However, this argument breaks down 
when the BTB has partial tags and when false BTB hits can occur.

In summary, how can you know whether or not an instruction is a control 
instruction at fetch time, before it has even been decoded?

Thanks,

Scott Blankenberg
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[gem5-users] Re: Access to gem5 101 course

[Scott Blankenberg via gem5-users]

Hello Javed Osmany,

Did you try clicking the links to the different parts of the course?

Thanks,

Scott Blankenberg
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[gem5-users] Trace CPU speedup

[Scott Blankenberg via gem5-users]

Dear all,


For those of you who have used the TraceCPU to replay elastic traces, how fast 
was the replay mechanism?

In other words how much faster is it to capture the trace and replay it with 
TraceCPU versus just re-simulating with O3CPU?

This question is somewhat open-ended and variable, but any thoughts/experiences 
would be appreciated.

Thanks,

Scott Blankenberg
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[gem5-users] Access to gem5 101 course

[Scott Blankenberg via gem5-users]

Dear all,

Can anyone still access the gem5 101 course at : 
https://www.gem5.org/documentation/learning_gem5/gem5_101/#:~:text=Branch%20prediction%20and%20predication%20are%20two%20common%20techniques,how%20to%20incorporate%20gem5%20into%20your%20research%20process.

When I click the links I get a page not found error.

Thanks,

Scott Blankenberg
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[gem5-users] Re: How to extract instruction traces

[Scott Blankenberg via gem5-users]

Update: Since then I have used the --debug-flags=ExecEnable,ExecUser,ExecKernel 
to extract a trace file.

However, I can't seem to find away to clip the output to just contain the 
instruction addresses. There does not seem to be an option for this. 

Does this mean I will have to modify the trace writer?
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[gem5-users] How to extract instruction traces

[Scott Blankenberg via gem5-users]

Dear all,

I was wondering if there was an easy way to extract the instruction traces for 
a given benchmark using GEM5. If so, is there a tutorial on how to do so? Or 
any other pointers someone could give me? Going through the GEM5 documentation, 
I have not found a straight-forward way yet. 

I did find out about the TraceCPU module referenced here: gem5: Trace CPU 
Model, but it seems like it only applies to O3 CPU model. Also, I am only 
interested in instruction traces, not memory requests.

In summary, is there some way to run GEM5 on a benchmark and output a file that 
contains the instruction trace?


Thanks,

Scott Blankenberg
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