[gem5-users] Re: Write through cache

2021-03-04 Thread yujiecui--- via gem5-users
Hi, Shougang Sorry to disturb you. I am a graduate student of computer architecture from China. I want to learn about the impact of write-back and write-through caching on performance. Did you implement the write-through policy on gem5 later? Thank you.

[gem5-users] Re: write-thrpugh vs write back

2021-03-01 Thread yujiecui--- via gem5-users
I have a similar problem. Have you achieved it? Or have you found an alternative? ___ gem5-users mailing list -- gem5-users@gem5.org To unsubscribe send an email to gem5-users-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-users] Re: How can I use Write Through Cache

2021-01-09 Thread yujiecui--- via gem5-users
Have you achieved it? I have a similar problem ___ gem5-users mailing list -- gem5-users@gem5.org To unsubscribe send an email to gem5-users-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-users] A segfault occurred when calling pkt->print()

2020-11-23 Thread yujiecui--- via gem5-users
When I use pkt->print() in the bool CommMonitor::recvTimingReq(PacketPtr pkt) function in gem5/src/mem/comm_monitor.cc file, a segmentation error occurred. This surprised me. I just changed `DPRINTF(CommMonitor, "Received %s response \n", pkt->isRead()? "Read": pkt->isWrite()? "Write": "non

[gem5-users] How to use CommMonitor in gem5

2020-11-22 Thread yujiecui--- via gem5-users
I want to record the access details of the cache. I saw some answers, saying that CommMonitor can help. But no more details were found. I have some questions about CommMonitor? 1. First of all, can Commmonitor be used for DerivO3CPU or only TimingSimpleCPU? I tried it on DerivO3CPU and there

[gem5-users] How to get the current data in the cache

2020-11-22 Thread yujiecui--- via gem5-users
I want to learn more about the cache replacement algorithm. For example, I want to know when the cache is replaced, what data is replaced, and what data is brought to the cache. It is a good choice to output this information using the debug flag in gem5. I use classic cache. I created a debug

[gem5-users] How to output the data in the cache set when the cache is replaced？

2020-11-22 Thread yujiecui--- via gem5-users
I want to learn more about the cache replacement algorithm. For example, I want to know when the cache is replaced, what data is replaced, and what data is brought to the cache. It is a good choice to output this information using the debug flag in gem5. But I found that I have no way to output

[gem5-users] Re: 'DPRINTF' was not declared in this scope

2020-11-22 Thread yujiecui--- via gem5-users
That worked. thank you. Would you mind explaining the following code for me? I have taken the course of C++, but I have never seen such usage. std::static_pointer_cast( candidate->replacementData)->valid I guess RandomReplData should be assigned to the template class, but

[gem5-users] 'DPRINTF' was not declared in this scope

2020-11-21 Thread yujiecui--- via gem5-users
I want to know the cache information when the replacement algorithm is executed. So I made the following changes in the latest version of gem5. I added a line of DebugFlag('ReplacementInfo') command to the /home/cuiyujie/workspace/workGem5/gem5/src/mem/cache/replacement_policies/SConscript

[gem5-users] Re: The latest gem5 did not compile successfully

2020-11-12 Thread yujiecui--- via gem5-users
Thank you for your reply. I put the latest version of gem5 into a directory that is not adjacent to the old version of gem5, and compiled successfully. But there are some warnings：*** Summary of Warnings *** Warning: Your compiler doesn't support incremental linking and lto at the same time, so

[gem5-users] When gem5 is debugged, how to judge the current position of data?

2020-11-12 Thread yujiecui--- via gem5-users
In the process of step-by-step debugging of gem5, how can I know whether a data currently exists in cache or in memory, and what level of cache it is? I think gem5 should provide such a method? Thanks for answer. ___ gem5-users mailing list --

[gem5-users] The latest gem5 did not compile successfully

2020-11-12 Thread yujiecui--- via gem5-users
I just downloaded the latest gem5. Then compiled it using the scons build / x86 / gem5. Opt command. But there was an error build / x86 / SystemC / channel/ messages.cc:83 :1: error: 'sc_ gem5' does not name a type Sc_ gem5::DefaultReportMessages predefinedMessages{ ^ scons: ***

[gem5-users] Why are there still so many decoding-related operations when fetching instructions into the instruction queue?

2020-11-03 Thread yujiecui--- via gem5-users
In the fetch function in the src/cpu/O3/fetch.impl file, when fetching instructions to the fetch queue, I saw some operations on the decoder, which made me very confused. For example, decoder[tid]->decode(thisPC), decoder[tid]->instReady(), decoder[tid]->needMoreBytes(),

[gem5-users] What is the role of TimeBuffer in gem5?

2020-11-03 Thread yujiecui--- via gem5-users
What does TimeBuffer in gem5 do? I read its source code, but there are no comments and it is not easy to understand operations. I saw in the tick function in the cpu.cc file that every tick() will proceed timeBuffer.advance(); fetchQueue.advance(); decodeQueue.advance();