Re: [gem5-users] Increasing TLB size not working for X86 with O3CPU

2018-05-28 Thread Da Zhang
Hi, Jason Sorry for my unclear description before. For our workload, the switch_cpus.dtb's miss rate for 64 tlb entries is 154654 / 1589214 = 9.74%; the miss rate for 1048576 tlb entries is 154360 / 1583757 = 9.73%. Both are running for 20ms warm up in atomic mode and 2.5ms real simulation with

Re: [gem5-users] Increasing TLB size not working for X86 with O3CPU

2018-05-28 Thread Jason Lowe-Power
Hi Da, "For size > 512, the whole stats.txt is identical." This isn't surprising. 512*4KB = 2MB. So, if your workload is only 1MB when you have at least 512 entries you are only seeing compulsory (cold) misses. Try running larger workloads and/or workloads with more reuse. Cheers, Jason On

Re: [gem5-users] Increasing TLB size not working for X86 with O3CPU

2018-05-24 Thread Da Zhang
I am using FS mode. On Thu, May 24, 2018 at 12:00 PM, Jason Lowe-Power wrote: > Hi Da, > > Are you using SE mode or FS mode? IIRC, the TLB size does nothing in SE > mode (it doesn't use a TLB). The TLB is only used in FS mode. > > Jason > > On Thu, May 24, 2018 at 8:45 AM

Re: [gem5-users] Increasing TLB size not working for X86 with O3CPU

2018-05-24 Thread Da Zhang
More details: The dtb read miss rate stays at 10%. Our workload is a simple sequential linked list search microbenchmark with fixed heap size at 1MB. Cache size is varied from 128KB to 2MB. On Thu, May 24, 2018 at 11:44 AM, Da Zhang wrote: > Hey guys, > > I tried to increase the

Re: [gem5-users] Increasing TLB size not working for X86 with O3CPU

2018-05-24 Thread Jason Lowe-Power
Hi Da, Are you using SE mode or FS mode? IIRC, the TLB size does nothing in SE mode (it doesn't use a TLB). The TLB is only used in FS mode. Jason On Thu, May 24, 2018 at 8:45 AM Da Zhang wrote: > Hey guys, > > I tried to increase the dtb size (i.e., number of tlb entries) for

[gem5-users] Increasing TLB size not working for X86 with O3CPU

2018-05-24 Thread Da Zhang
Hey guys, I tried to increase the dtb size (i.e., number of tlb entries) for our research. However, the stats.txt for the different dtb size (64,128,256,512,1024,2048,1048576) is practical identical or identical. For size < 512, the system.switch_cpus.dtb.rdAccesses difference is only several