Hi Jason,
Thank you so much! This is great information!
Regards,
Balazs
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Hi Balazs,
That sounds a lot like elastic traces. See the documentation:
https://www.gem5.org/documentation/general_docs/cpu_models/TraceCPU and the
paper: https://ieeexplore.ieee.org/document/7482084.
Even if elastic traces don't work for your purpose, the code for them
should give you hints on
Dear Jason,
Thank you for the reply. I would like to ask you a follow-up question on this
topic.
We are now considering to build a simplified simulator for which we would need
detailed execution ticks of memory access instructions.
We would like to log the timestamps when memory accesses are iss
Hi Balazs,
What you suggest sounds like a panacea! I'm not sure it's possible, though
:(.
There are multiple different levels of fidelity between the O3 CPU and the
Timing Simple CPU. You could imagine other CPU models with more or less
fidelity as well, but currently these are the two main model
