Hi Emil, You can remove that check. However, you should note that the classic caches aren't designed to support high-bandwidth operation. Also, this assert triggering could be a sign that there's infinite queuing somewhere (which is one reason why the classic caches aren't great for high bandwidth systems).
Cheers, Jason On Wed, Sep 8, 2021 at 3:48 AM Emil VATAI via gem5-users < gem5-users@gem5.org> wrote: > Hi, > > We are trying to do some simulations. We are using a simulator based on an > old version of Gem5 ([1] created to simulate a64fx chip). > We made some further modifications, namely replaced `SnoopMask` to be of > type `std::bitset<>` to be able to run more-or-less arbitrary number of > cores. And running with more cores resulted in triggering the following > panic in `coherent_xbar.cc` (it occurs 2x in the code, around line 330 and > 400 [3], not sure which one was triggered). > ``` > panic_if(routeTo.size() > 512, "Routing table exceeds 512 packets\n"); > ``` > comparing this to a more recent version of gem5 the constant 512 seems to > be the `maxRoutingTableSizeCheck` variable [4]. > > My question is, how important is that check? How will it impact the > simulation? Will it still be a "correct" simulation (or will skipping that > check do something silly, like skip simulation half of the memory writes or > something like that). > > Best, > Emil > > [1] https://github.com/RIKEN-RCCS/riken_simulator > [2] https://github.com/bgerofi/riken_simulator/ > [3] > https://github.com/bgerofi/riken_simulator/blob/1f6627cf95688c508b73c8ead6838aa1f843f436/src/mem/coherent_xbar.cc#L339 > [4] > https://github.com/gem5/gem5/blob/87c121fd954ea5a6e6b0760d693a2e744c2200de/src/mem/coherent_xbar.cc#L346 > _______________________________________________ > gem5-users mailing list -- gem5-users@gem5.org > To unsubscribe send an email to gem5-users-le...@gem5.org > %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s >
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