Hi,
I want to run SMT in FS mode, however, the support does not exist for it.
Is there a reason for this support to not be available? Is it easy to
implement SMT in FS mode?
Thanks!
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Thanks for your email.
I will look into the "multi-level TLB for Arm" implementation
Wish you a good day
Arun
On Thu, May 18, 2023 at 9:25 PM Giacomo Travaglini <
giacomo.travagl...@arm.com> wrote:
> Just for the sake of completeness (I know Arun asked about X86).
> There is a multi-level TLB
Hi,
Can anyone please tell me whether a multi-level TLB implementation is
currently available for x86?
Thanks
Arun
On Wed, Oct 28, 2020 at 9:01 PM Jason Lowe-Power via gem5-users <
gem5-users@gem5.org> wrote:
> Yes, this is possible, and I believe it's already implemented for Arm.
>
> The best
There is not a multi-level TLB model in mainline gem5.
Cheers,
Jason
On Thu, May 18, 2023 at 5:43 AM Arun Kavumkal via gem5-users <
gem5-users@gem5.org> wrote:
> Hi,
> Can anyone please tell me whether a multi-level TLB implementation is
> currently available for x86?
>
> Thanks
> Arun
>
> On
Just for the sake of completeness (I know Arun asked about X86).
There is a multi-level TLB for Arm; it is possible for other ISAs to implement
the same, it requires a developer to move the translateAtomic/Timing methods
from the TLB to the MMU
Kind Regards
Giacomo
From: Jason Lowe-Power via