Re: [gem5-users] ARM DerivO3CPU assertion failed
I've been trying to dig in more in the code... I think there is a bug when the ArmTLB is trying to switch to the Ruby memory subsystem. Is anyone having any trouble with this aswell? Carlos On 21/2/20 15:59, Ciro Santilli wrote: I observe the following behavior on se.py ARM and X86, which depends on --restore-with-cpu. I have used a minimal userland executable that only does two things in assembly: m5 checkpoint and m5 exit (total of only 5 instructions in aarch64) @Jason: can you confirm the difference between se.py --restore-with-cpu and --cpu-type during a checkpoint restore (and if any of the outcome below are buggy or not)? At https://stackoverflow.com/questions/49011096/how-to-switch-cpu-models-in-gem5-after-restoring-a-checkpoint-and-then-observe-t it was mentioned that --restore-with-cpu should be the old CPU (defaults to AtomicSimpleCPU), and --cpu-type the new CPU, is that correct? Asking because I have observed less failures if I set --restore-with-cpu to equal --cpu-type. I'll open/update clear bugs with the test binaries for any behavior which is not correct. == Default Build Restore with: --cpu-type DerivO3CPU Outcome: gem5 crashes: panic: Attempted to execute unknown instruction (inst 0x) Restore with: --cpu-type DerivO3CPU --restore-with-cpu DerivO3CPU Outcome: works == MESI_Three_Level build Checkpoint run with: --ruby Outcome: hangs forever when taking the checkpoint. Checkpoint run at the commit before bb94296373dde1d0ce971ee58ad111f4225c425e (which https://gem5.atlassian.net/projects/GEM5/issues/GEM5-331 claims broke Ruby checkpointing on MOESI_hammer): Outcome: "panic: Runtime Error at MESI_Three_Level-L0cache.sm:249: Invalid RubyRequestType." This is the correct outcome because MESE_Three_Level does have flush operations which are needed to create checkpoints. Checkpoint run: without --ruby Restore run: --ruby --cpu-type DerivO3CPU Outcome: gem5 crashes with: build/ARM/sim/port.hh:131: void Port::takeOverFrom(Port*): Assertion `old->isConnected()' failed. Checkpoint run: without --ruby Restore run: --ruby --cpu-type DerivO3CPU --restore-with-cpu DerivO3CPU Outcome: works Checkpoint run on a C hello world without m5ops: --fast-forward 1000 --ruby --cpu-type DerivO3CPU --restore-with-cpu DerivO3CPU Outcome: build/ARM/sim/port.hh:131: void Port::takeOverFrom(Port*): Assertion `old->isConnected()' failed. == MOESI_hammer build Same as MESI_Three_Level, except that the checkpoint with --ruby works before bb94296373dde1d0ce971ee58ad111f4225c425e as expected. On 2/12/20 9:45 AM, Carlos Escuin wrote: Thank you for replying, Yes, it seems that something is not going well while switching from AtomicSimpleCPU to DerivO3CPU. Carlos On 11/2/20 21:48, Giacomo Travaglini wrote: Seems like there is an issue when you are switching over the new cpu model. Will have a look into that Giacomo *From:* gem5-users on behalf of Carlos Escuin *Sent:* 11 February 2020 16:46 *To:* gem5-users@gem5.org *Subject:* [gem5-users] ARM DerivO3CPU assertion failed Hi all, I'm trying to execute bzip2 spec 2006 benchmark in ARM, se, DerivO3CPU, ruby, fast-forward. Anyone has any idea why I'm getting this assertion failing? Thank you, Carlos OUTPUT: command line: gem5/build/ARM_MOESI_CMP_directory/gem5.opt -v --outdir=gem5/m5out/spec2k6/bzip2_base gem5/configs/example/se.py --num-cpus=1 --cmd=CPU2006_ARM/bzip2_dir/bzip2 --input= --output= '--options=CPU2006_ARM/bzip2_dir/input.source 280' --fast-forward=500 --maxinsts=1200 --cpu-type=DerivO3CPU --ruby --l1d_size=32kB --l1i_size=32kB --l1d_assoc=8 --l1i_assoc=8 --l2_size=1MB --l2_assoc=16 --network=garnet2.0 info: Standard input is not a terminal, disabling listeners. Global frequency set at 1 ticks per second warn: Sockets disabled, not accepting gdb connections Switch at instruction count:500 info: Entering event queue @ 0. Starting simulation... info: Increasing stack size by one page. Switched CPUS @ tick 2977722500 switching cpus warn: ClockedObject: Already in the requested power state, request ignored warn: User mode does not have SPSR warn: User mode does not have SPSR gem5.opt: build/ARM_MOESI_CMP_directory/sim/port.hh:135: void Port::takeOverFrom(Port*): Assertion `old->isConnected()' failed. Program aborted at tick 2977722500 --- BEGIN LIBC BACKTRACE --- gem5/build/ARM_MOESI_CMP_directory/gem5.opt(_Z15print_backtracev+0x15)[0x1281115] gem5/build/ARM_MOESI_CMP_directory/gem5.opt(_Z12abortHandleri+0x36)[0x128b526] /lib64/libpthread.so.0(+0xf7e0)[0x2afcc8dfd7e0] /lib64/libc.so.6(gsignal+0x35)[0x2afcc99ea4f5] /lib64/libc.so.6(abort+0x175)[0x2afcc99ebcd5] /lib64/libc.so.6(+0x2b66e)[0x2afcc99e366e] /lib64/libc.so.6(__assert_perror_fail+0x0)[0x2afcc99e3730] gem5/build/ARM_MOESI_CMP_directory/gem5.opt(_ZN7BaseCPU19updateCycleCountersENS_8CPUStateE+0x0)[0x10557f0]
Re: [gem5-users] ARM DerivO3CPU assertion failed
I observe the following behavior on se.py ARM and X86, which depends on --restore-with-cpu. I have used a minimal userland executable that only does two things in assembly: m5 checkpoint and m5 exit (total of only 5 instructions in aarch64) @Jason: can you confirm the difference between se.py --restore-with-cpu and --cpu-type during a checkpoint restore (and if any of the outcome below are buggy or not)? At https://stackoverflow.com/questions/49011096/how-to-switch-cpu-models-in-gem5-after-restoring-a-checkpoint-and-then-observe-t it was mentioned that --restore-with-cpu should be the old CPU (defaults to AtomicSimpleCPU), and --cpu-type the new CPU, is that correct? Asking because I have observed less failures if I set --restore-with-cpu to equal --cpu-type. I'll open/update clear bugs with the test binaries for any behavior which is not correct. == Default Build Restore with: --cpu-type DerivO3CPU Outcome: gem5 crashes: panic: Attempted to execute unknown instruction (inst 0x) Restore with: --cpu-type DerivO3CPU --restore-with-cpu DerivO3CPU Outcome: works == MESI_Three_Level build Checkpoint run with: --ruby Outcome: hangs forever when taking the checkpoint. Checkpoint run at the commit before bb94296373dde1d0ce971ee58ad111f4225c425e (which https://gem5.atlassian.net/projects/GEM5/issues/GEM5-331 claims broke Ruby checkpointing on MOESI_hammer): Outcome: "panic: Runtime Error at MESI_Three_Level-L0cache.sm:249: Invalid RubyRequestType." This is the correct outcome because MESE_Three_Level does have flush operations which are needed to create checkpoints. Checkpoint run: without --ruby Restore run: --ruby --cpu-type DerivO3CPU Outcome: gem5 crashes with: build/ARM/sim/port.hh:131: void Port::takeOverFrom(Port*): Assertion `old->isConnected()' failed. Checkpoint run: without --ruby Restore run: --ruby --cpu-type DerivO3CPU --restore-with-cpu DerivO3CPU Outcome: works Checkpoint run on a C hello world without m5ops: --fast-forward 1000 --ruby --cpu-type DerivO3CPU --restore-with-cpu DerivO3CPU Outcome: build/ARM/sim/port.hh:131: void Port::takeOverFrom(Port*): Assertion `old->isConnected()' failed. == MOESI_hammer build Same as MESI_Three_Level, except that the checkpoint with --ruby works before bb94296373dde1d0ce971ee58ad111f4225c425e as expected. On 2/12/20 9:45 AM, Carlos Escuin wrote: Thank you for replying, Yes, it seems that something is not going well while switching from AtomicSimpleCPU to DerivO3CPU. Carlos On 11/2/20 21:48, Giacomo Travaglini wrote: Seems like there is an issue when you are switching over the new cpu model. Will have a look into that Giacomo *From:* gem5-users on behalf of Carlos Escuin *Sent:* 11 February 2020 16:46 *To:* gem5-users@gem5.org *Subject:* [gem5-users] ARM DerivO3CPU assertion failed Hi all, I'm trying to execute bzip2 spec 2006 benchmark in ARM, se, DerivO3CPU, ruby, fast-forward. Anyone has any idea why I'm getting this assertion failing? Thank you, Carlos OUTPUT: command line: gem5/build/ARM_MOESI_CMP_directory/gem5.opt -v --outdir=gem5/m5out/spec2k6/bzip2_base gem5/configs/example/se.py --num-cpus=1 --cmd=CPU2006_ARM/bzip2_dir/bzip2 --input= --output= '--options=CPU2006_ARM/bzip2_dir/input.source 280' --fast-forward=500 --maxinsts=1200 --cpu-type=DerivO3CPU --ruby --l1d_size=32kB --l1i_size=32kB --l1d_assoc=8 --l1i_assoc=8 --l2_size=1MB --l2_assoc=16 --network=garnet2.0 info: Standard input is not a terminal, disabling listeners. Global frequency set at 1 ticks per second warn: Sockets disabled, not accepting gdb connections Switch at instruction count:500 info: Entering event queue @ 0.� Starting simulation... info: Increasing stack size by one page. Switched CPUS @ tick 2977722500 switching cpus warn: ClockedObject: Already in the requested power state, request ignored warn: User mode does not have SPSR warn: User mode does not have SPSR gem5.opt: build/ARM_MOESI_CMP_directory/sim/port.hh:135: void Port::takeOverFrom(Port*): Assertion `old->isConnected()' failed. Program aborted at tick 2977722500 --- BEGIN LIBC BACKTRACE --- gem5/build/ARM_MOESI_CMP_directory/gem5.opt(_Z15print_backtracev+0x15)[0x1281115] gem5/build/ARM_MOESI_CMP_directory/gem5.opt(_Z12abortHandleri+0x36)[0x128b526] /lib64/libpthread.so.0(+0xf7e0)[0x2afcc8dfd7e0] /lib64/libc.so.6(gsignal+0x35)[0x2afcc99ea4f5] /lib64/libc.so.6(abort+0x175)[0x2afcc99ebcd5] /lib64/libc.so.6(+0x2b66e)[0x2afcc99e366e] /lib64/libc.so.6(__assert_perror_fail+0x0)[0x2afcc99e3730] gem5/build/ARM_MOESI_CMP_directory/gem5.opt(_ZN7BaseCPU19updateCycleCountersENS_8CPUStateE+0x0)[0x10557f0] gem5/build/ARM_MOESI_CMP_directory/gem5.opt(_ZN7BaseCPU12takeOverFromEPS_+0x209)[0x10469e9] gem5/build/ARM_MOESI_CMP_directory/gem5.opt(_ZN9FullO3CPUI9O3CPUImplE12takeOverFromEP7BaseCPU+0x11)[0x11da821] gem5/build/ARM_MOESI_CMP_directory/gem5.opt[0xe4ac96]
Re: [gem5-users] ARM DerivO3CPU assertion failed
Thank you for replying, Yes, it seems that something is not going well while switching from AtomicSimpleCPU to DerivO3CPU. Carlos On 11/2/20 21:48, Giacomo Travaglini wrote: Seems like there is an issue when you are switching over the new cpu model. Will have a look into that Giacomo *From:* gem5-users on behalf of Carlos Escuin *Sent:* 11 February 2020 16:46 *To:* gem5-users@gem5.org *Subject:* [gem5-users] ARM DerivO3CPU assertion failed Hi all, I'm trying to execute bzip2 spec 2006 benchmark in ARM, se, DerivO3CPU, ruby, fast-forward. Anyone has any idea why I'm getting this assertion failing? Thank you, Carlos OUTPUT: command line: gem5/build/ARM_MOESI_CMP_directory/gem5.opt -v --outdir=gem5/m5out/spec2k6/bzip2_base gem5/configs/example/se.py --num-cpus=1 --cmd=CPU2006_ARM/bzip2_dir/bzip2 --input= --output= '--options=CPU2006_ARM/bzip2_dir/input.source 280' --fast-forward=500 --maxinsts=1200 --cpu-type=DerivO3CPU --ruby --l1d_size=32kB --l1i_size=32kB --l1d_assoc=8 --l1i_assoc=8 --l2_size=1MB --l2_assoc=16 --network=garnet2.0 info: Standard input is not a terminal, disabling listeners. Global frequency set at 1 ticks per second warn: Sockets disabled, not accepting gdb connections Switch at instruction count:500 info: Entering event queue @ 0. Starting simulation... info: Increasing stack size by one page. Switched CPUS @ tick 2977722500 switching cpus warn: ClockedObject: Already in the requested power state, request ignored warn: User mode does not have SPSR warn: User mode does not have SPSR gem5.opt: build/ARM_MOESI_CMP_directory/sim/port.hh:135: void Port::takeOverFrom(Port*): Assertion `old->isConnected()' failed. Program aborted at tick 2977722500 --- BEGIN LIBC BACKTRACE --- gem5/build/ARM_MOESI_CMP_directory/gem5.opt(_Z15print_backtracev+0x15)[0x1281115] gem5/build/ARM_MOESI_CMP_directory/gem5.opt(_Z12abortHandleri+0x36)[0x128b526] /lib64/libpthread.so.0(+0xf7e0)[0x2afcc8dfd7e0] /lib64/libc.so.6(gsignal+0x35)[0x2afcc99ea4f5] /lib64/libc.so.6(abort+0x175)[0x2afcc99ebcd5] /lib64/libc.so.6(+0x2b66e)[0x2afcc99e366e] /lib64/libc.so.6(__assert_perror_fail+0x0)[0x2afcc99e3730] gem5/build/ARM_MOESI_CMP_directory/gem5.opt(_ZN7BaseCPU19updateCycleCountersENS_8CPUStateE+0x0)[0x10557f0] gem5/build/ARM_MOESI_CMP_directory/gem5.opt(_ZN7BaseCPU12takeOverFromEPS_+0x209)[0x10469e9] gem5/build/ARM_MOESI_CMP_directory/gem5.opt(_ZN9FullO3CPUI9O3CPUImplE12takeOverFromEP7BaseCPU+0x11)[0x11da821] gem5/build/ARM_MOESI_CMP_directory/gem5.opt[0xe4ac96] gem5/build/ARM_MOESI_CMP_directory/gem5.opt[0xdfb79f] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalFrameEx+0x74bf)[0x2afcc8ab374f] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalCodeEx+0x80d)[0x2afcc8ab5a7d] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalFrameEx+0x6962)[0x2afcc8ab2bf2] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalCodeEx+0x80d)[0x2afcc8ab5a7d] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalFrameEx+0x6962)[0x2afcc8ab2bf2] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalCodeEx+0x80d)[0x2afcc8ab5a7d] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalFrameEx+0x6962)[0x2afcc8ab2bf2] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalCodeEx+0x80d)[0x2afcc8ab5a7d] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalCode+0x32)[0x2afcc8ab5bb2] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalFrameEx+0x8f7b)[0x2afcc8ab520b] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalCodeEx+0x80d)[0x2afcc8ab5a7d] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalFrameEx+0x6962)[0x2afcc8ab2bf2] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalCodeEx+0x80d)[0x2afcc8ab5a7d] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalCode+0x32)[0x2afcc8ab5bb2] python-2.7.15/libpython2.7.so.1.0(PyRun_StringFlags+0x79)[0x2afcc8ae17e9] gem5/build/ARM_MOESI_CMP_directory/gem5.opt(_Z6m5MainiPPc+0x5f)[0x128a2ef] gem5/build/ARM_MOESI_CMP_directory/gem5.opt(main+0x38)[0xa9aee8] /lib64/libc.so.6(__libc_start_main+0x100)[0x2afcc99d6d20] gem5/build/ARM_MOESI_CMP_directory/gem5.opt[0xa9ad79] --- END LIBC BACKTRACE --- ./execute_se_arm.sh: line 296: 12602 Aborted (core dumped) gem5/build/ARM_MOESI_CMP_directory/gem5.opt -v --outdir=gem5/m5out/spec2k6/bzip2_base gem5/configs/example/se.py --num-cpus=1 --cmd="CPU2006_ARM/bzip2_dir/bzip2" --input="" --output="" --options="CPU2006_ARM/bzip2_dir/input.source 280" --fast-forward=500 --maxinsts=1200 --cpu-type=DerivO3CPU --ruby --l1d_size=32kB --l1i_size=32kB --l1d_assoc=8 --l1i_assoc=8 --l2_size=1MB --l2_assoc=16 --network=garnet2.0 ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy
Re: [gem5-users] ARM DerivO3CPU assertion failed
Seems like there is an issue when you are switching over the new cpu model. Will have a look into that Giacomo From: gem5-users on behalf of Carlos Escuin Sent: 11 February 2020 16:46 To: gem5-users@gem5.org Subject: [gem5-users] ARM DerivO3CPU assertion failed Hi all, I'm trying to execute bzip2 spec 2006 benchmark in ARM, se, DerivO3CPU, ruby, fast-forward. Anyone has any idea why I'm getting this assertion failing? Thank you, Carlos OUTPUT: command line: gem5/build/ARM_MOESI_CMP_directory/gem5.opt -v --outdir=gem5/m5out/spec2k6/bzip2_base gem5/configs/example/se.py --num-cpus=1 --cmd=CPU2006_ARM/bzip2_dir/bzip2 --input= --output= '--options=CPU2006_ARM/bzip2_dir/input.source 280' --fast-forward=500 --maxinsts=1200 --cpu-type=DerivO3CPU --ruby --l1d_size=32kB --l1i_size=32kB --l1d_assoc=8 --l1i_assoc=8 --l2_size=1MB --l2_assoc=16 --network=garnet2.0 info: Standard input is not a terminal, disabling listeners. Global frequency set at 1 ticks per second warn: Sockets disabled, not accepting gdb connections Switch at instruction count:500 info: Entering event queue @ 0. Starting simulation... info: Increasing stack size by one page. Switched CPUS @ tick 2977722500 switching cpus warn: ClockedObject: Already in the requested power state, request ignored warn: User mode does not have SPSR warn: User mode does not have SPSR gem5.opt: build/ARM_MOESI_CMP_directory/sim/port.hh:135: void Port::takeOverFrom(Port*): Assertion `old->isConnected()' failed. Program aborted at tick 2977722500 --- BEGIN LIBC BACKTRACE --- gem5/build/ARM_MOESI_CMP_directory/gem5.opt(_Z15print_backtracev+0x15)[0x1281115] gem5/build/ARM_MOESI_CMP_directory/gem5.opt(_Z12abortHandleri+0x36)[0x128b526] /lib64/libpthread.so.0(+0xf7e0)[0x2afcc8dfd7e0] /lib64/libc.so.6(gsignal+0x35)[0x2afcc99ea4f5] /lib64/libc.so.6(abort+0x175)[0x2afcc99ebcd5] /lib64/libc.so.6(+0x2b66e)[0x2afcc99e366e] /lib64/libc.so.6(__assert_perror_fail+0x0)[0x2afcc99e3730] gem5/build/ARM_MOESI_CMP_directory/gem5.opt(_ZN7BaseCPU19updateCycleCountersENS_8CPUStateE+0x0)[0x10557f0] gem5/build/ARM_MOESI_CMP_directory/gem5.opt(_ZN7BaseCPU12takeOverFromEPS_+0x209)[0x10469e9] gem5/build/ARM_MOESI_CMP_directory/gem5.opt(_ZN9FullO3CPUI9O3CPUImplE12takeOverFromEP7BaseCPU+0x11)[0x11da821] gem5/build/ARM_MOESI_CMP_directory/gem5.opt[0xe4ac96] gem5/build/ARM_MOESI_CMP_directory/gem5.opt[0xdfb79f] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalFrameEx+0x74bf)[0x2afcc8ab374f] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalCodeEx+0x80d)[0x2afcc8ab5a7d] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalFrameEx+0x6962)[0x2afcc8ab2bf2] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalCodeEx+0x80d)[0x2afcc8ab5a7d] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalFrameEx+0x6962)[0x2afcc8ab2bf2] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalCodeEx+0x80d)[0x2afcc8ab5a7d] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalFrameEx+0x6962)[0x2afcc8ab2bf2] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalCodeEx+0x80d)[0x2afcc8ab5a7d] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalCode+0x32)[0x2afcc8ab5bb2] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalFrameEx+0x8f7b)[0x2afcc8ab520b] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalCodeEx+0x80d)[0x2afcc8ab5a7d] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalFrameEx+0x6962)[0x2afcc8ab2bf2] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalCodeEx+0x80d)[0x2afcc8ab5a7d] python-2.7.15/libpython2.7.so.1.0(PyEval_EvalCode+0x32)[0x2afcc8ab5bb2] python-2.7.15/libpython2.7.so.1.0(PyRun_StringFlags+0x79)[0x2afcc8ae17e9] gem5/build/ARM_MOESI_CMP_directory/gem5.opt(_Z6m5MainiPPc+0x5f)[0x128a2ef] gem5/build/ARM_MOESI_CMP_directory/gem5.opt(main+0x38)[0xa9aee8] /lib64/libc.so.6(__libc_start_main+0x100)[0x2afcc99d6d20] gem5/build/ARM_MOESI_CMP_directory/gem5.opt[0xa9ad79] --- END LIBC BACKTRACE --- ./execute_se_arm.sh: line 296: 12602 Aborted (core dumped) gem5/build/ARM_MOESI_CMP_directory/gem5.opt -v --outdir=gem5/m5out/spec2k6/bzip2_base gem5/configs/example/se.py --num-cpus=1 --cmd="CPU2006_ARM/bzip2_dir/bzip2" --input="" --output="" --options="CPU2006_ARM/bzip2_dir/input.source 280" --fast-forward=500 --maxinsts=1200 --cpu-type=DerivO3CPU --ruby --l1d_size=32kB --l1i_size=32kB --l1d_assoc=8 --l1i_assoc=8 --l2_size=1MB --l2_assoc=16 --network=garnet2.0 ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users