Re: [gem5-users] x86 floating point instruction

2018-05-28 Thread Tariq Azmy
Thanks Jason. I also came across the same document earlier but I just wanted to ask about this in general. On Mon, May 28, 2018 at 11:09 AM, Jason Lowe-Power wrote: > Hi Tariq, > > It's up to you what you want the latency for SSE instructions to be. It > depends on what architecture you're

Re: [gem5-users] x86 floating point instruction

2018-05-28 Thread Jason Lowe-Power
Hi Tariq, It's up to you what you want the latency for SSE instructions to be. It depends on what architecture you're simulating. Unfortunately, we currently don't have any "known good" configurations for x86 cores so you'll have to come up with your own :). Here's some examples of numbers you

Re: [gem5-users] x86 floating point instruction

2018-05-25 Thread Tariq Azmy
Hi Gabe, Jason, Are those x86 SIMD SSE arithmetic instructions take only one cycle as latency? I looked into the FuncUnitConfig.py and seems like the op lats for the SIMD functional units are not defined, so I assumed it takes value of 1 by default. I am not really familiar with x86 SIMD

Re: [gem5-users] x86 floating point instruction

2018-05-24 Thread Jason Lowe-Power
Hi Tariq, It wold be great if you could review Gabe's patch on gerrit. Since it works for you, giving it a +1 or a +2 would be appropriate. Cheers, Jason On Wed, May 23, 2018 at 5:56 PM Tariq Azmy wrote: > Thanks Gabe. Yeah it does not impact the program but it's just

Re: [gem5-users] x86 floating point instruction

2018-05-23 Thread Tariq Azmy
Thanks Gabe. Yeah it does not impact the program but it's just that the statistic is incorrect. By the way, I applied the patch and stats now shows correct micro-ops entries. Appreciate your help. Thanks again On Wed, May 23, 2018 at 6:51 PM, Gabe Black wrote: > Yep,