Re: understanding assertions, part deux :) Re: whither built in unlifted Word32# / Word64# etc?

2018-08-01 Thread Abhiroop Sarkar
t; > On Wed, Aug 1, 2018 at 11:25 PM Abhiroop Sarkar > wrote: > >> Never mind I found the issue and fixed it. >> >> It was the definition of the `Int32` type constructor: >> >> int32PrimTyCon = pcPrimTyCon0 int32PrimTyConName IntRep >> >> which had t

Re: understanding assertions, part deux :) Re: whither built in unlifted Word32# / Word64# etc?

2018-08-01 Thread Abhiroop Sarkar
:36 PM Abhiroop Sarkar wrote: > Hello, > > I would appreciate some help in debugging a Cmm Lint error, I have been > stuck on for quite a while. > > Basically I am adding support for Int32# on top of the In8#(D4475) and > Int16#(D5006) patches. > > The Cmm being gene

Re: understanding assertions, part deux :) Re: whither built in unlifted Word32# / Word64# etc?

2018-08-01 Thread Abhiroop Sarkar
8 at 8:31 PM Michal Terepeta < >>>> michal.terep...@gmail.com> wrote: >>>> >>>>> Just for the record, I've uploaded the changes to binary: >>>>> https://github.com/michalt/packages-binary/tree/int8 >>>>> >>>

Re: Is it possible to enhance the vector STG registers(Xmm, Ymm, Zmm) with more information?

2018-07-13 Thread Abhiroop Sarkar
:26 PM Abhiroop Sarkar wrote: > Sorry I mistyped and forgot to include the register number in the mail but > it is present in the patch. So it is: > > data GlobalReg = ... > | XmmReg !Int >

Re: Is it possible to enhance the vector STG registers(Xmm, Ymm, Zmm) with more information?

2018-07-13 Thread Abhiroop Sarkar
er number, like all the rest? > > > > Generally, sounds good though > > > > S > > > > *From:* Abhiroop Sarkar > *Sent:* 13 July 2018 14:07 > *To:* Simon Peyton Jones > *Cc:* ghc-devs@haskell.org > *Subject:* Re: Is it possible to enhance

Re: Is it possible to enhance the vector STG registers(Xmm, Ymm, Zmm) with more information?

2018-07-13 Thread Abhiroop Sarkar
) is > register 3 used as a non-pointer. And notice that globalRegType looks at > this field to decide what type to return. > > > > I think you can do exactly the same: add a field to Xmm that explains how > you are gong to divide it up. Would that work? > > > &

Is it possible to enhance the vector STG registers(Xmm, Ymm, Zmm) with more information?

2018-06-27 Thread Abhiroop Sarkar
Hello all, I am currently working on adding support for SIMD operations to the native code generator. One of the roadblocks I faced recently was the definition of the `globalRegType` function in "compiler/cmm/CmmExpr.hs". The `globalRegType` function maps the STG registers to the respective

Viewing the types declared in GHC.Prim in local machine

2018-03-19 Thread Abhiroop Sarkar
the latest GHC codebase I could not find this dummy file on my machine. Do I have to modify my Makefile somehow to generate these dummy types? For building, I have followed the instructions mentioned here[2] and set `BuildFlavour = devel2`. Thanks, Abhiroop Sarkar [1]https://ghc.haskell.org/trac/ghc/wiki