> On 2/12/2015, at 9:45 am, Attila Kinali <att...@kinali.ch> wrote: > > http://attila.kinali.ch/tdc/
david_koontz@Macbook: ghdl -a --std=08 tdc_lbc_cls.vhd ******************** GHDL Bug occured **************************** Please report this bug on http://gna.org/projects/ghdl GHDL release: GHDL 0.33 (20150921) [Dunoon edition] Compiled with GNAT Version: GPL 2015 (20150428-49) In directory: /Users/david_koontz/Desktop/atilla kinali/tdc/ Command line: /usr/local/bin/ghdl1-llvm --std=08 -P/usr/local/lib/ghdl/v08/std/ -P/usr/local/lib/ghdl/v08/ieee/ -c -o tdc_lbc_cls.o tdc_lbc_cls.vhd Exception SYSTEM.ASSERTIONS.ASSERT_FAILURE raised Exception information: Exception name: SYSTEM.ASSERTIONS.ASSERT_FAILURE Message: trans.adb:393 Load address: 0x101556000 Call stack traceback locations: 0x102018791 0x101673440 0x101694338 0x1016909cf 0x1016912d0 0x101690f3e 0x1016913a5 0x1016dcecc 0x10167e1d6 0x1016e2158 0x101596c0e 0x101557cda ****************************************************************** ghdl: compilation error ————— entity tdc_lbc_cls is and down in the second generate statement: CLS: entity tdc_lbc_cls generic map ( g_N => g_N-1, g_NIN => g_NIN/2 ) If you take out the reserved word entity: david_koontz@Macbook: ghdl -a --std=08 tdc_lbc_cls.vhd tdc_lbc_cls.vhd:107:21: component name expected, found entity "tdc_lbc_cls" ghdl: compilation error And if you add a component declaration: architecture rtl of tdc_lbc_cls is component tdc_lbc_cls is generic ( -- Number of output bits. g_N: positive; -- Number of input bits. Maximum is 2^g_N-1. g_NIN: positive ); port ( clk_i: in std_logic; reset_i: in std_logic; symbol_i: in std_logic; d_i: in std_logic_vector(g_NIN-1 downto 0); count_o: out std_logic_vector(g_N-1 downto 0) ); end component; begin david_koontz@Macbook: !! ghdl -a --std=08 tdc_lbc_cls.vhd david_koontz@Macbook: It analyzes (and the entire thing elaborates) Note the failing direct entity instantiation entity name is not an expanded name. Making it one doesn't fix the uncaught error (giving the same line number in trans.adb). Anyway, there's an uncaught error and a workaround (use component instantiation instead of direct entity instantiation). david_koontz@Macbook: tb_lbc tb_lbc.vhd:157:17:@10ns:(report note): Vector out: 101010011011001011101110000001001000011011111101001001110010101 (polarity: 1) tb_lbc.vhd:157:17:@20ns:(report note): Vector out: 001110101000111100001111001100100110100000110100101001011001100 (polarity: 0) tb_lbc.vhd:157:17:@30ns:(report note): Vector out: 111001101010010111110010110001111111011011000011111000010010101 (polarity: 1) tb_lbc.vhd:169:17:@30ns:(report note): Result in: expected:1(1) output:1(1) tb_lbc.vhd:157:17:@40ns:(report note): Vector out: 000011101001111010001110000010010011101000001010110111101000000 (polarity: 0) tb_lbc.vhd:169:17:@40ns:(report note): Result in: expected:2(0) output:2(0) tb_lbc.vhd:157:17:@50ns:(report note): Vector out: 111110101001111000101011010110001001011101001010101100111101110 (polarity: 1) tb_lbc.vhd:169:17:@50ns:(report note): Result in: expected:3(1) output:3(1) tb_lbc.vhd:157:17:@60ns:(report note): Vector out: 000000110001011010110100000101101011101000000100010010001001101 (polarity: 0) tb_lbc.vhd:169:17:@60ns:(report note): Result in: expected:4(0) output:4(0) tb_lbc.vhd:157:17:@70ns:(report note): Vector out: 111111100001001010101000000010011011011110001101001000001110111 (polarity: 1) tb_lbc.vhd:169:17:@70ns:(report note): Result in: expected:5(1) output:5(1) tb_lbc.vhd:157:17:@80ns:(report note): Vector out: 000000001000010101011000011011100100011001011101100000011010010 (polarity: 0) tb_lbc.vhd:169:17:@80ns:(report note): Result in: expected:6(0) output:6(0) tb_lbc.vhd:157:17:@90ns:(report note): Vector out: 111111111001010111111100001000000111110010000101100110001101111 (polarity: 1) tb_lbc.vhd:169:17:@90ns:(report note): Result in: expected:7(1) output:7(1) tb_lbc.vhd:157:17:@100ns:(report note): Vector out: 000000000011010011000001001100001000010111011001111011101101100 (polarity: 0) tb_lbc.vhd:169:17:@100ns:(report note): Result in: expected:8(0) output:8(0) tb_lbc.vhd:157:17:@110ns:(report note): Vector out: 111111111110011001011000100010011011011001101110001101100111100 (polarity: 1) tb_lbc.vhd:169:17:@110ns:(report note): Result in: expected:9(1) output:9(1) tb_lbc.vhd:157:17:@120ns:(report note): Vector out: 000000000000110000001001100011110101100100100110011111110101011 (polarity: 0) tb_lbc.vhd:169:17:@120ns:(report note): Result in: expected:10(0) output:10(0) tb_lbc.vhd:157:17:@130ns:(report note): Vector out: 111111111111101010010100110001100101111101011011001100010001110 (polarity: 1) tb_lbc.vhd:169:17:@130ns:(report note): Result in: expected:11(1) output:11(1) tb_lbc.vhd:157:17:@140ns:(report note): Vector out: 000000000000001101101110010001011101000010100100011101101101110 (polarity: 0) tb_lbc.vhd:169:17:@140ns:(report note): Result in: expected:12(0) output:12(0) tb_lbc.vhd:157:17:@150ns:(report note): Vector out: 111111111111111011110000111001110110100010000111001110100101101 (polarity: 1) tb_lbc.vhd:169:17:@150ns:(report note): Result in: expected:13(1) output:13(1) tb_lbc.vhd:157:17:@160ns:(report note): Vector out: 000000000000000010111100000100001001101010110001110010011101001 (polarity: 0) tb_lbc.vhd:169:17:@160ns:(report note): Result in: expected:14(0) output:14(0) tb_lbc.vhd:157:17:@170ns:(report note): Vector out: 111111111111111110101101001100110011001011001001000001101000000 (polarity: 1) tb_lbc.vhd:169:17:@170ns:(report note): Result in: expected:15(1) output:15(1) tb_lbc.vhd:157:17:@180ns:(report note): Vector out: 000000000000000000100010010101110001001001000101011011010111110 (polarity: 0) tb_lbc.vhd:169:17:@180ns:(report note): Result in: expected:16(0) output:16(0) tb_lbc.vhd:157:17:@190ns:(report note): Vector out: 111111111111111111101010111000011101111110000000101011001100100 (polarity: 1) tb_lbc.vhd:169:17:@190ns:(report note): Result in: expected:17(1) output:17(1) tb_lbc.vhd:157:17:@200ns:(report note): Vector out: 000000000000000000001011010010111111011101001001011111100000010 (polarity: 0) tb_lbc.vhd:169:17:@200ns:(report note): Result in: expected:18(0) output:18(0) tb_lbc.vhd:157:17:@210ns:(report note): Vector out: 111111111111111111111001111011010010111001111101111010111010011 (polarity: 1) tb_lbc.vhd:169:17:@210ns:(report note): Result in: expected:19(1) output:19(1) tb_lbc.vhd:157:17:@220ns:(report note): Vector out: 000000000000000000000011001001011011001010000101000010001000100 (polarity: 0) tb_lbc.vhd:169:17:@220ns:(report note): Result in: expected:20(0) output:20(0) tb_lbc.vhd:157:17:@230ns:(report note): Vector out: 111111111111111111111110000101010101101010000011101000001000111 (polarity: 1) tb_lbc.vhd:169:17:@230ns:(report note): Result in: expected:21(1) output:21(1) tb_lbc.vhd:157:17:@240ns:(report note): Vector out: 000000000000000000000000111101011111111001110100000101111100011 (polarity: 0) tb_lbc.vhd:169:17:@240ns:(report note): Result in: expected:22(0) output:22(0) tb_lbc.vhd:157:17:@250ns:(report note): Vector out: 111111111111111111111111100011110000100110010010110101111100001 (polarity: 1) tb_lbc.vhd:169:17:@250ns:(report note): Result in: expected:23(1) output:23(1) tb_lbc.vhd:157:17:@260ns:(report note): Vector out: 000000000000000000000000001011011011001001101111100111011101110 (polarity: 0) tb_lbc.vhd:169:17:@260ns:(report note): Result in: expected:24(0) output:24(0) tb_lbc.vhd:157:17:@270ns:(report note): Vector out: 111111111111111111111111111000001010011010100001111110001101001 (polarity: 1) tb_lbc.vhd:169:17:@270ns:(report note): Result in: expected:25(1) output:25(1) tb_lbc.vhd:157:17:@280ns:(report note): Vector out: 000000000000000000000000000011010001011011011011111100011010110 (polarity: 0) tb_lbc.vhd:169:17:@280ns:(report note): Result in: expected:26(0) output:26(0) tb_lbc.vhd:157:17:@290ns:(report note): Vector out: 111111111111111111111111111110110001010000110111010010011010111 (polarity: 1) tb_lbc.vhd:169:17:@290ns:(report note): Result in: expected:27(1) output:27(1) tb_lbc.vhd:157:17:@300ns:(report note): Vector out: 000000000000000000000000000000101100110011111011111001010101001 (polarity: 0) tb_lbc.vhd:169:17:@300ns:(report note): Result in: expected:28(0) output:28(0) tb_lbc.vhd:157:17:@310ns:(report note): Vector out: 111111111111111111111111111111100000010000000100110000000111000 (polarity: 1) tb_lbc.vhd:169:17:@310ns:(report note): Result in: expected:29(1) output:29(1) tb_lbc.vhd:157:17:@320ns:(report note): Vector out: 000000000000000000000000000000001011001100110010111010001111111 (polarity: 0) tb_lbc.vhd:169:17:@320ns:(report note): Result in: expected:30(0) output:30(0) tb_lbc.vhd:157:17:@330ns:(report note): Vector out: 111111111111111111111111111111111001001111111001001001101101110 (polarity: 1) tb_lbc.vhd:169:17:@330ns:(report note): Result in: expected:31(1) output:31(1) tb_lbc.vhd:157:17:@340ns:(report note): Vector out: 000000000000000000000000000000000010110010001001101010110011100 (polarity: 0) tb_lbc.vhd:169:17:@340ns:(report note): Result in: expected:32(0) output:32(0) tb_lbc.vhd:157:17:@350ns:(report note): Vector out: 111111111111111111111111111111111110100011001010111110101101010 (polarity: 1) tb_lbc.vhd:169:17:@350ns:(report note): Result in: expected:33(1) output:33(1) tb_lbc.vhd:157:17:@360ns:(report note): Vector out: 000000000000000000000000000000000000101001001001000011000001000 (polarity: 0) tb_lbc.vhd:169:17:@360ns:(report note): Result in: expected:34(0) output:34(0) tb_lbc.vhd:157:17:@370ns:(report note): Vector out: 111111111111111111111111111111111111100100101101111110100100011 (polarity: 1) tb_lbc.vhd:169:17:@370ns:(report note): Result in: expected:35(1) output:35(1) tb_lbc.vhd:157:17:@380ns:(report note): Vector out: 000000000000000000000000000000000000001111000101111101011000010 (polarity: 0) tb_lbc.vhd:169:17:@380ns:(report note): Result in: expected:36(0) output:36(0) tb_lbc.vhd:157:17:@390ns:(report note): Vector out: 111111111111111111111111111111111111111010001101111100100110100 (polarity: 1) tb_lbc.vhd:169:17:@390ns:(report note): Result in: expected:37(1) output:37(1) tb_lbc.vhd:157:17:@400ns:(report note): Vector out: 000000000000000000000000000000000000000011001111000011001010000 (polarity: 0) tb_lbc.vhd:169:17:@400ns:(report note): Result in: expected:38(0) output:38(0) tb_lbc.vhd:157:17:@410ns:(report note): Vector out: 111111111111111111111111111111111111111110110100000000010111110 (polarity: 1) tb_lbc.vhd:169:17:@410ns:(report note): Result in: expected:39(1) output:39(1) tb_lbc.vhd:157:17:@420ns:(report note): Vector out: 000000000000000000000000000000000000000000100001000001011101111 (polarity: 0) tb_lbc.vhd:169:17:@420ns:(report note): Result in: expected:40(0) output:40(0) tb_lbc.vhd:157:17:@430ns:(report note): Vector out: 111111111111111111111111111111111111111111100001101011011111011 (polarity: 1) tb_lbc.vhd:169:17:@430ns:(report note): Result in: expected:41(1) output:41(1) tb_lbc.vhd:157:17:@440ns:(report note): Vector out: 000000000000000000000000000000000000000000001111000000011010100 (polarity: 0) tb_lbc.vhd:169:17:@440ns:(report note): Result in: expected:42(0) output:42(0) tb_lbc.vhd:157:17:@450ns:(report note): Vector out: 111111111111111111111111111111111111111111111001001100010010110 (polarity: 1) tb_lbc.vhd:169:17:@450ns:(report note): Result in: expected:43(1) output:43(1) tb_lbc.vhd:157:17:@460ns:(report note): Vector out: 000000000000000000000000000000000000000000000010000011011101111 (polarity: 0) tb_lbc.vhd:169:17:@460ns:(report note): Result in: expected:44(0) output:44(0) tb_lbc.vhd:157:17:@470ns:(report note): Vector out: 111111111111111111111111111111111111111111111110100011010101111 (polarity: 1) tb_lbc.vhd:169:17:@470ns:(report note): Result in: expected:45(1) output:45(1) tb_lbc.vhd:157:17:@480ns:(report note): Vector out: 000000000000000000000000000000000000000000000000111010111101000 (polarity: 0) tb_lbc.vhd:169:17:@480ns:(report note): Result in: expected:46(0) output:46(0) tb_lbc.vhd:157:17:@490ns:(report note): Vector out: 111111111111111111111111111111111111111111111111101000100001100 (polarity: 1) tb_lbc.vhd:169:17:@490ns:(report note): Result in: expected:47(1) output:47(1) tb_lbc.vhd:157:17:@500ns:(report note): Vector out: 000000000000000000000000000000000000000000000000001001011110100 (polarity: 0) tb_lbc.vhd:169:17:@500ns:(report note): Result in: expected:48(0) output:48(0) tb_lbc.vhd:157:17:@510ns:(report note): Vector out: 111111111111111111111111111111111111111111111111111000001000000 (polarity: 1) tb_lbc.vhd:169:17:@510ns:(report note): Result in: expected:49(1) output:49(1) tb_lbc.vhd:157:17:@520ns:(report note): Vector out: 000000000000000000000000000000000000000000000000000010000101111 (polarity: 0) tb_lbc.vhd:169:17:@520ns:(report note): Result in: expected:50(0) output:50(0) tb_lbc.vhd:157:17:@530ns:(report note): Vector out: 111111111111111111111111111111111111111111111111111110001110100 (polarity: 1) tb_lbc.vhd:169:17:@530ns:(report note): Result in: expected:51(1) output:51(1) tb_lbc.vhd:157:17:@540ns:(report note): Vector out: 000000000000000000000000000000000000000000000000000000100010010 (polarity: 0) tb_lbc.vhd:169:17:@540ns:(report note): Result in: expected:52(0) output:52(0) tb_lbc.vhd:157:17:@550ns:(report note): Vector out: 111111111111111111111111111111111111111111111111111111100110111 (polarity: 1) tb_lbc.vhd:169:17:@550ns:(report note): Result in: expected:53(1) output:53(1) tb_lbc.vhd:157:17:@560ns:(report note): Vector out: 000000000000000000000000000000000000000000000000000000001000011 (polarity: 0) tb_lbc.vhd:169:17:@560ns:(report note): Result in: expected:54(0) output:54(0) tb_lbc.vhd:157:17:@570ns:(report note): Vector out: 111111111111111111111111111111111111111111111111111111111011101 (polarity: 1) tb_lbc.vhd:169:17:@570ns:(report note): Result in: expected:55(1) output:55(1) tb_lbc.vhd:157:17:@580ns:(report note): Vector out: 000000000000000000000000000000000000000000000000000000000010011 (polarity: 0) tb_lbc.vhd:169:17:@580ns:(report note): Result in: expected:56(0) output:56(0) tb_lbc.vhd:157:17:@590ns:(report note): Vector out: 111111111111111111111111111111111111111111111111111111111110101 (polarity: 1) tb_lbc.vhd:169:17:@590ns:(report note): Result in: expected:57(1) output:57(1) tb_lbc.vhd:157:17:@600ns:(report note): Vector out: 000000000000000000000000000000000000000000000000000000000000110 (polarity: 0) tb_lbc.vhd:169:17:@600ns:(report note): Result in: expected:58(0) output:58(0) tb_lbc.vhd:157:17:@610ns:(report note): Vector out: 111111111111111111111111111111111111111111111111111111111111100 (polarity: 1) tb_lbc.vhd:169:17:@610ns:(report note): Result in: expected:59(1) output:59(1) tb_lbc.vhd:157:17:@620ns:(report note): Vector out: 000000000000000000000000000000000000000000000000000000000000001 (polarity: 0) tb_lbc.vhd:169:17:@620ns:(report note): Result in: expected:60(0) output:60(0) tb_lbc.vhd:157:17:@630ns:(report note): Vector out: 111111111111111111111111111111111111111111111111111111111111111 (polarity: 1) tb_lbc.vhd:169:17:@630ns:(report note): Result in: expected:61(1) output:61(1) tb_lbc.vhd:169:17:@640ns:(report note): Result in: expected:62(0) output:62(0) tb_lbc.vhd:169:17:@650ns:(report note): Result in: expected:63(1) output:63(1) tb_lbc.vhd:179:9:@660ns:(report note): Test passed. david_koontz@Macbook: _______________________________________________ Ghdl-discuss mailing list Ghdl-discuss@gna.org https://mail.gna.org/listinfo/ghdl-discuss
