Gitweb:
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=e9316f9be6bc7cf949a89df6162e25e7fbb867be
Commit: e9316f9be6bc7cf949a89df6162e25e7fbb867be
Parent: 092651c5a988ffca98ee26bbb42688fbfd448718
Author: Ben Dooks <[EMAIL PROTECTED]>
AuthorDate: Thu Feb 15 16:28:11 2007 +0100
Committer: Russell King <[EMAIL PROTECTED]>
CommitDate: Thu Feb 15 15:32:58 2007 +0000
[ARM] 4196/1: S3C24XX: add S3C2410_IRQSUB() to define IRQ for sub-sources
Add a define of S3C2410_IRQSUB() to define all
the sources from the IRQSUB register, to make it
easier to work out the datasheet=>irq mappings
Signed-off-by: Ben Dooks <[EMAIL PROTECTED]>
Signed-off-by: Russell King <[EMAIL PROTECTED]>
---
include/asm-arm/arch-s3c2410/irqs.h | 33 ++++++++++++++++++---------------
1 files changed, 18 insertions(+), 15 deletions(-)
diff --git a/include/asm-arm/arch-s3c2410/irqs.h
b/include/asm-arm/arch-s3c2410/irqs.h
index 4b7cff4..f28e2d5 100644
--- a/include/asm-arm/arch-s3c2410/irqs.h
+++ b/include/asm-arm/arch-s3c2410/irqs.h
@@ -94,27 +94,30 @@
* these need to be ordered in number of appearance in the
* SUBSRC mask register
*/
-#define IRQ_S3CUART_RX0 S3C2410_IRQ(54) /* 70 */
-#define IRQ_S3CUART_TX0 S3C2410_IRQ(55) /* 71 */
-#define IRQ_S3CUART_ERR0 S3C2410_IRQ(56)
-#define IRQ_S3CUART_RX1 S3C2410_IRQ(57)
-#define IRQ_S3CUART_TX1 S3C2410_IRQ(58)
-#define IRQ_S3CUART_ERR1 S3C2410_IRQ(59)
+#define S3C2410_IRQSUB(x) S3C2410_IRQ((x)+54)
-#define IRQ_S3CUART_RX2 S3C2410_IRQ(60)
-#define IRQ_S3CUART_TX2 S3C2410_IRQ(61)
-#define IRQ_S3CUART_ERR2 S3C2410_IRQ(62)
+#define IRQ_S3CUART_RX0 S3C2410_IRQSUB(0) /* 70 */
+#define IRQ_S3CUART_TX0 S3C2410_IRQSUB(1)
+#define IRQ_S3CUART_ERR0 S3C2410_IRQSUB(2)
-#define IRQ_TC S3C2410_IRQ(63)
-#define IRQ_ADC S3C2410_IRQ(64)
+#define IRQ_S3CUART_RX1 S3C2410_IRQSUB(3) /* 73 */
+#define IRQ_S3CUART_TX1 S3C2410_IRQSUB(4)
+#define IRQ_S3CUART_ERR1 S3C2410_IRQSUB(5)
+
+#define IRQ_S3CUART_RX2 S3C2410_IRQSUB(6) /* 76 */
+#define IRQ_S3CUART_TX2 S3C2410_IRQSUB(7)
+#define IRQ_S3CUART_ERR2 S3C2410_IRQSUB(8)
+
+#define IRQ_TC S3C2410_IRQSUB(9)
+#define IRQ_ADC S3C2410_IRQSUB(10)
/* extra irqs for s3c2440 */
-#define IRQ_S3C2440_CAM_C S3C2410_IRQ(65)
-#define IRQ_S3C2440_CAM_P S3C2410_IRQ(66)
-#define IRQ_S3C2440_WDT S3C2410_IRQ(67)
-#define IRQ_S3C2440_AC97 S3C2410_IRQ(68)
+#define IRQ_S3C2440_CAM_C S3C2410_IRQSUB(11)
+#define IRQ_S3C2440_CAM_P S3C2410_IRQSUB(12)
+#define IRQ_S3C2440_WDT S3C2410_IRQSUB(13)
+#define IRQ_S3C2440_AC97 S3C2410_IRQSUB(14)
#define NR_IRQS (IRQ_S3C2440_AC97+1)
-
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