Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=53f3945a160af9a2282b9fad0f6ccde25e4ed805
Commit:     53f3945a160af9a2282b9fad0f6ccde25e4ed805
Parent:     f023dc769c47b9158d897ee8a0278bdfe39b0115
Author:     Xianghua Xiao <[EMAIL PROTECTED]>
AuthorDate: Wed Oct 3 15:09:15 2007 -0500
Committer:  Kumar Gala <[EMAIL PROTECTED]>
CommitDate: Mon Oct 8 08:38:23 2007 -0500

    [POWERPC] Add initial MPC8610 HPCD Device Tree Source file.
    
    Signed-off-by: Xianghua Xiao <[EMAIL PROTECTED]>
    Signed-off-by: Jon Loeliger <[EMAIL PROTECTED]>
    Signed-off-by: Kumar Gala <[EMAIL PROTECTED]>
---
 arch/powerpc/boot/dts/mpc8610_hpcd.dts |  191 ++++++++++++++++++++++++++++++++
 1 files changed, 191 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts 
b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
new file mode 100644
index 0000000..966edf1
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -0,0 +1,191 @@
+/*
+ * MPC8610 HPCD Device Tree Source
+ *
+ * Copyright 2007 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under the terms of the GNU General Public License Version 2 as published
+ * by the Free Software Foundation.
+ */
+
+
+/ {
+       model = "MPC8610HPCD";
+       compatible = "fsl,MPC8610HPCD";
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               PowerPC,[EMAIL PROTECTED] {
+                       device_type = "cpu";
+                       reg = <0>;
+                       d-cache-line-size = <d# 32>;    // bytes
+                       i-cache-line-size = <d# 32>;    // bytes
+                       d-cache-size = <8000>;          // L1, 32K
+                       i-cache-size = <8000>;          // L1, 32K
+                       timebase-frequency = <0>;       // 33 MHz, from uboot
+                       bus-frequency = <0>;            // From uboot
+                       clock-frequency = <0>;          // From uboot
+               };
+       };
+
+       memory {
+               device_type = "memory";
+               reg = <00000000 20000000>;      // 512M at 0x0
+       };
+
+       [EMAIL PROTECTED] {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               #interrupt-cells = <2>;
+               device_type = "soc";
+               ranges = <0 e0000000 00100000>;
+               reg = <e0000000 1000>;
+               bus-frequency = <0>;
+
+               [EMAIL PROTECTED] {
+                       device_type = "i2c";
+                       compatible = "fsl-i2c";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <3000 100>;
+                       interrupts = <2b 2>;
+                       interrupt-parent = <&mpic>;
+                       dfsrr;
+               };
+
+               [EMAIL PROTECTED] {
+                       device_type = "i2c";
+                       compatible = "fsl-i2c";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <3100 100>;
+                       interrupts = <2b 2>;
+                       interrupt-parent = <&mpic>;
+                       dfsrr;
+               };
+
+               [EMAIL PROTECTED] {
+                       device_type = "serial";
+                       compatible = "ns16550";
+                       reg = <4500 100>;
+                       clock-frequency = <0>;
+                       interrupts = <2a 2>;
+                       interrupt-parent = <&mpic>;
+               };
+
+               [EMAIL PROTECTED] {
+                       device_type = "serial";
+                       compatible = "ns16550";
+                       reg = <4600 100>;
+                       clock-frequency = <0>;
+                       interrupts = <1c 2>;
+                       interrupt-parent = <&mpic>;
+               };
+
+
+               mpic: [EMAIL PROTECTED] {
+                       clock-frequency = <0>;
+                       interrupt-controller;
+                       #address-cells = <0>;
+                       #interrupt-cells = <2>;
+                       reg = <40000 40000>;
+                       compatible = "chrp,open-pic";
+                       device_type = "open-pic";
+                       big-endian;
+               };
+
+               [EMAIL PROTECTED] {
+                       compatible = "fsl,mpc8610-guts";
+                       reg = <e0000 1000>;
+                       fsl,has-rstcr;
+               };
+       };
+
+       [EMAIL PROTECTED] {
+               compatible = "fsl,mpc8610-pci";
+               device_type = "pci";
+               #interrupt-cells = <1>;
+               #size-cells = <2>;
+               #address-cells = <3>;
+               reg = <e0008000 1000>;
+               bus-range = <0 0>;
+               ranges = <02000000 0 80000000 80000000 0 10000000
+                         01000000 0 00000000 e1000000 0 00100000>;
+               clock-frequency = <1fca055>;
+               interrupt-parent = <&mpic>;
+               interrupts = <18 2>;
+               interrupt-map-mask = <f800 0 0 7>;
+               interrupt-map = <
+                       /* IDSEL 0x11 */
+                       8800 0 0 1 &mpic 4 1
+                       8800 0 0 2 &mpic 5 1
+                       8800 0 0 3 &mpic 6 1
+                       8800 0 0 4 &mpic 7 1
+
+                       /* IDSEL 0x12 */
+                       9000 0 0 1 &mpic 5 1
+                       9000 0 0 2 &mpic 6 1
+                       9000 0 0 3 &mpic 7 1
+                       9000 0 0 4 &mpic 4 1
+                       >;
+       };
+
+       [EMAIL PROTECTED] {
+               compatible = "fsl,mpc8641-pcie";
+               device_type = "pci";
+               #interrupt-cells = <1>;
+               #size-cells = <2>;
+               #address-cells = <3>;
+               reg = <e000a000 1000>;
+               bus-range = <1 3>;
+               ranges = <02000000 0 a0000000 a0000000 0 10000000
+                         01000000 0 00000000 e3000000 0 00100000>;
+               clock-frequency = <1fca055>;
+               interrupt-parent = <&mpic>;
+               interrupts = <1a 2>;
+               interrupt-map-mask = <f800 0 0 7>;
+
+               interrupt-map = <
+                       /* IDSEL 0x1b */
+                       d800 0 0 1 &mpic 2 1
+
+                       /* IDSEL 0x1c*/
+                       e000 0 0 1 &mpic 1 1
+                       e000 0 0 2 &mpic 1 1
+                       e000 0 0 3 &mpic 1 1
+                       e000 0 0 4 &mpic 1 1
+
+                       /* IDSEL 0x1f */
+                       f800 0 0 1 &mpic 3 0
+                       f800 0 0 2 &mpic 0 1
+               >;
+
+               [EMAIL PROTECTED] {
+                       reg = <0 0 0 0 0>;
+                       #size-cells = <2>;
+                       #address-cells = <3>;
+                       device_type = "pci";
+                       ranges = <02000000 0 a0000000
+                                 02000000 0 a0000000
+                                 0 10000000
+                                 01000000 0 00000000
+                                 01000000 0 00000000
+                                 0 00100000>;
+                       [EMAIL PROTECTED] {
+                               reg = <0 0 0 0 0>;
+                               #size-cells = <2>;
+                               #address-cells = <3>;
+                               ranges = <02000000 0 a0000000
+                                         02000000 0 a0000000
+                                         0 10000000
+                                         01000000 0 00000000
+                                         01000000 0 00000000
+                                         0 00100000>;
+                       };
+               };
+       };
+};
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