Gitweb:
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=17213c3bf67bd532d4d04c286663f9bbf92b9c18
Commit: 17213c3bf67bd532d4d04c286663f9bbf92b9c18
Parent: 979ee32f7f8e9582a0cadd4ed9a158ddc3036ad1
Author: Linas Vepstas <[EMAIL PROTECTED]>
AuthorDate: Thu May 10 02:38:11 2007 +1000
Committer: Paul Mackerras <[EMAIL PROTECTED]>
CommitDate: Thu May 10 21:28:13 2007 +1000
[POWERPC] Assorted janitorial EEH cleanups
Assorted minor cleanups to EEH code; -- use literals, use
kerneldoc format.
Signed-off-by: Linas Vepstas <[EMAIL PROTECTED]>
----
arch/powerpc/platforms/pseries/eeh.c | 13 ++++++++++---
arch/powerpc/platforms/pseries/eeh_driver.c | 7 ++++---
include/asm-powerpc/ppc-pci.h | 18 +++++++++++++++---
3 files changed, 29 insertions(+), 9 deletions(-)
Signed-off-by: Paul Mackerras <[EMAIL PROTECTED]>
---
arch/powerpc/platforms/pseries/eeh.c | 13 ++++++++++---
arch/powerpc/platforms/pseries/eeh_driver.c | 7 ++++---
include/asm-powerpc/ppc-pci.h | 18 +++++++++++++++---
3 files changed, 29 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/eeh.c
b/arch/powerpc/platforms/pseries/eeh.c
index 093438b..5f3e6d8 100644
--- a/arch/powerpc/platforms/pseries/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -76,7 +76,7 @@
*/
#define EEH_MAX_FAILS 2100000
-/* Time to wait for a PCI slot to retport status, in milliseconds */
+/* Time to wait for a PCI slot to report status, in milliseconds */
#define PCI_BUS_RESET_WAIT_MSEC (60*1000)
/* RTAS tokens */
@@ -95,11 +95,18 @@ EXPORT_SYMBOL(eeh_subsystem_enabled);
/* Lock to avoid races due to multiple reports of an error */
static DEFINE_SPINLOCK(confirm_error_lock);
-/* Buffer for reporting slot-error-detail rtas calls */
+/* Buffer for reporting slot-error-detail rtas calls. Its here
+ * in BSS, and not dynamically alloced, so that it ends up in
+ * RMO where RTAS can access it.
+ */
static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX];
static DEFINE_SPINLOCK(slot_errbuf_lock);
static int eeh_error_buf_size;
+/* Buffer for reporting pci register dumps. Its here in BSS, and
+ * not dynamically alloced, so that it ends up in RMO where RTAS
+ * can access it.
+ */
#define EEH_PCI_REGS_LOG_LEN 4096
static unsigned char pci_regs_buf[EEH_PCI_REGS_LOG_LEN];
@@ -218,7 +225,7 @@ static size_t gather_pci_data(struct pci_dn *pdn, char *
buf, size_t len)
void eeh_slot_error_detail(struct pci_dn *pdn, int severity)
{
size_t loglen = 0;
- memset(pci_regs_buf, 0, EEH_PCI_REGS_LOG_LEN);
+ pci_regs_buf[0] = 0;
rtas_pci_enable(pdn, EEH_THAW_MMIO);
loglen = gather_pci_data(pdn, pci_regs_buf, EEH_PCI_REGS_LOG_LEN);
diff --git a/arch/powerpc/platforms/pseries/eeh_driver.c
b/arch/powerpc/platforms/pseries/eeh_driver.c
index f07d849..161a584 100644
--- a/arch/powerpc/platforms/pseries/eeh_driver.c
+++ b/arch/powerpc/platforms/pseries/eeh_driver.c
@@ -378,8 +378,9 @@ struct pci_dn * handle_eeh_events (struct eeh_event *event)
/* Since rtas may enable MMIO when posting the error log,
* don't post the error log until after all dev drivers
- * have been informed. */
- eeh_slot_error_detail(frozen_pdn, 1 /* Temporary Error */);
+ * have been informed.
+ */
+ eeh_slot_error_detail(frozen_pdn, EEH_LOG_TEMP_FAILURE);
/* If all device drivers were EEH-unaware, then shut
* down all of the device drivers, and hope they
@@ -470,7 +471,7 @@ hard_fail:
location, drv_str, pci_str);
perm_error:
- eeh_slot_error_detail(frozen_pdn, 2 /* Permanent Error */);
+ eeh_slot_error_detail(frozen_pdn, EEH_LOG_PERM_FAILURE);
/* Notify all devices that they're about to go down. */
pci_walk_bus(frozen_bus, eeh_report_failure, NULL);
diff --git a/include/asm-powerpc/ppc-pci.h b/include/asm-powerpc/ppc-pci.h
index 6dcd7a8..8e20051 100644
--- a/include/asm-powerpc/ppc-pci.h
+++ b/include/asm-powerpc/ppc-pci.h
@@ -62,11 +62,14 @@ struct pci_dev *pci_get_device_by_addr(unsigned long addr);
/**
* eeh_slot_error_detail -- record and EEH error condition to the log
- * @severity: 1 if temporary, 2 if permanent failure.
+ * @pdn: pci device node
+ * @severity: EEH_LOG_TEMP_FAILURE or EEH_LOG_PERM_FAILURE
*
* Obtains the EEH error details from the RTAS subsystem,
* and then logs these details with the RTAS error log system.
*/
+#define EEH_LOG_TEMP_FAILURE 1
+#define EEH_LOG_PERM_FAILURE 2
void eeh_slot_error_detail (struct pci_dn *pdn, int severity);
/**
@@ -82,6 +85,7 @@ int rtas_pci_enable(struct pci_dn *pdn, int function);
/**
* rtas_set_slot_reset -- unfreeze a frozen slot
+ * @pdn: pci device node
*
* Clear the EEH-frozen condition on a slot. This routine
* does this by asserting the PCI #RST line for 1/8th of
@@ -95,6 +99,7 @@ int eeh_wait_for_slot_status(struct pci_dn *pdn, int
max_wait_msecs);
/**
* eeh_restore_bars - Restore device configuration info.
+ * @pdn: pci device node
*
* A reset of a PCI device will clear out its config space.
* This routines will restore the config space for this
@@ -105,6 +110,7 @@ void eeh_restore_bars(struct pci_dn *);
/**
* rtas_configure_bridge -- firmware initialization of pci bridge
+ * @pdn: pci device node
*
* Ask the firmware to configure all PCI bridges devices
* located behind the indicated node. Required after a
@@ -118,16 +124,22 @@ int rtas_write_config(struct pci_dn *, int where, int
size, u32 val);
int rtas_read_config(struct pci_dn *, int where, int size, u32 *val);
/**
+ * eeh_mark_slot -- set mode flags for pertition endpoint
+ * @pdn: pci device node
+ *
* mark and clear slots: find "partition endpoint" PE and set or
* clear the flags for each subnode of the PE.
*/
void eeh_mark_slot (struct device_node *dn, int mode_flag);
void eeh_clear_slot (struct device_node *dn, int mode_flag);
-/* Find the associated "Partiationable Endpoint" PE */
+/**
+ * find_device_pe -- Find the associated "Partiationable Endpoint" PE
+ * @pdn: pci device node
+ */
struct device_node * find_device_pe(struct device_node *dn);
-#endif
+#endif /* CONFIG_EEH */
#else /* CONFIG_PCI */
static inline void find_and_init_phbs(void) { }
-
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