Gitweb:
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=2fce1225af6f2d3bb9ffb4e6253400db61278594
Commit: 2fce1225af6f2d3bb9ffb4e6253400db61278594
Parent: 873553b3d6b3b19f187a5630300ece20bbf74afd
Author: Kumar Gala <[EMAIL PROTECTED]>
AuthorDate: Wed Oct 3 23:37:33 2007 -0500
Committer: Kumar Gala <[EMAIL PROTECTED]>
CommitDate: Mon Oct 8 08:38:37 2007 -0500
[POWERPC] FSL: Access PCIe LTSSM register with correct size
The LTSSM register is actual 32-bits wide so we should be doing a
dword access.
Signed-off-by: Kumar Gala <[EMAIL PROTECTED]>
---
arch/powerpc/sysdev/fsl_pci.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 98290f4..af090c9 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -160,8 +160,8 @@ static void __init quirk_fsl_pcie_transparent(struct
pci_dev *dev)
int __init fsl_pcie_check_link(struct pci_controller *hose)
{
- u16 val;
- early_read_config_word(hose, 0, 0, PCIE_LTSSM, &val);
+ u32 val;
+ early_read_config_dword(hose, 0, 0, PCIE_LTSSM, &val);
if (val < PCIE_LTSSM_L0)
return 1;
return 0;
-
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