Gitweb:
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=e62687f995fd7ba0b68c3b0a4f4d9fd9d1c54ec2
Commit: e62687f995fd7ba0b68c3b0a4f4d9fd9d1c54ec2
Parent: 4bbd10fd312f50de74ba53f6cb968986da5dfe92
Author: Robin Getz <[EMAIL PROTECTED]>
AuthorDate: Sun Aug 5 17:21:55 2007 +0800
Committer: Bryan Wu <[EMAIL PROTECTED]>
CommitDate: Sun Aug 5 17:21:55 2007 +0800
Blackfin arch: fix the aliased write macros
Signed-off-by: Robin Getz <[EMAIL PROTECTED]>
Signed-off-by: Bryan Wu <[EMAIL PROTECTED]>
---
include/asm-blackfin/mach-bf561/cdefBF561.h | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/asm-blackfin/mach-bf561/cdefBF561.h
b/include/asm-blackfin/mach-bf561/cdefBF561.h
index 6e87ab2..73d4d65 100644
--- a/include/asm-blackfin/mach-bf561/cdefBF561.h
+++ b/include/asm-blackfin/mach-bf561/cdefBF561.h
@@ -83,9 +83,9 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
/* For MMR's that are reserved on Core B, set up defines to better integrate
with other ports */
#define bfin_read_SWRST() bfin_read_SICA_SWRST()
-#define bfin_write_SWRST() bfin_write_SICA_SWRST()
+#define bfin_write_SWRST(val) bfin_write_SICA_SWRST(val)
#define bfin_read_SYSCR() bfin_read_SICA_SYSCR()
-#define bfin_write_SYSCR() bfin_write_SICA_SYSCR()
+#define bfin_write_SYSCR(val) bfin_write_SICA_SYSCR(val)
/* System Reset and Interrupt Controller registers for core A (0xFFC0
0100-0xFFC0 01FF) */
#define bfin_read_SICA_SWRST() bfin_read16(SICA_SWRST)
-
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