Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=5dcccd8d7eae870d85c3f175fd0823d3da07d0e3
Commit:     5dcccd8d7eae870d85c3f175fd0823d3da07d0e3
Parent:     0f8dc2f06560e2ca126d1670a24126ba08357d38
Author:     Andi Kleen <[EMAIL PROTECTED]>
AuthorDate: Wed Jul 4 01:38:13 2007 +0200
Committer:  Linus Torvalds <[EMAIL PROTECTED]>
CommitDate: Tue Jul 3 18:11:35 2007 -0700

    Revert perfctr reservation to 2.6.21 state
    
    With this change it works again when the nmi watchdog is disabled.
    
    Signed-off-by: Andi Kleen <[EMAIL PROTECTED]>
    Cc: Björn Steinbrink <[EMAIL PROTECTED]>
    Cc: Stephane Eranian <[EMAIL PROTECTED]>
    Cc: Andrew Morton <[EMAIL PROTECTED]>
    Signed-off-by: Linus Torvalds <[EMAIL PROTECTED]>
---
 arch/i386/kernel/cpu/perfctr-watchdog.c |   35 +++++++++++++++++++++++++++++-
 1 files changed, 33 insertions(+), 2 deletions(-)

diff --git a/arch/i386/kernel/cpu/perfctr-watchdog.c 
b/arch/i386/kernel/cpu/perfctr-watchdog.c
index f0b6763..4d26d51 100644
--- a/arch/i386/kernel/cpu/perfctr-watchdog.c
+++ b/arch/i386/kernel/cpu/perfctr-watchdog.c
@@ -55,14 +55,45 @@ static DEFINE_PER_CPU(struct nmi_watchdog_ctlblk, 
nmi_watchdog_ctlblk);
 /* converts an msr to an appropriate reservation bit */
 static inline unsigned int nmi_perfctr_msr_to_bit(unsigned int msr)
 {
-       return wd_ops ? msr - wd_ops->perfctr : 0;
+       /* returns the bit offset of the performance counter register */
+       switch (boot_cpu_data.x86_vendor) {
+       case X86_VENDOR_AMD:
+               return (msr - MSR_K7_PERFCTR0);
+       case X86_VENDOR_INTEL:
+               if (cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON))
+                       return (msr - MSR_ARCH_PERFMON_PERFCTR0);
+
+               switch (boot_cpu_data.x86) {
+               case 6:
+                       return (msr - MSR_P6_PERFCTR0);
+               case 15:
+                       return (msr - MSR_P4_BPU_PERFCTR0);
+               }
+       }
+       return 0;
 }
 
 /* converts an msr to an appropriate reservation bit */
 /* returns the bit offset of the event selection register */
 static inline unsigned int nmi_evntsel_msr_to_bit(unsigned int msr)
 {
-       return wd_ops ? msr - wd_ops->evntsel : 0;
+       /* returns the bit offset of the event selection register */
+       switch (boot_cpu_data.x86_vendor) {
+       case X86_VENDOR_AMD:
+               return (msr - MSR_K7_EVNTSEL0);
+       case X86_VENDOR_INTEL:
+               if (cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON))
+                       return (msr - MSR_ARCH_PERFMON_EVENTSEL0);
+
+               switch (boot_cpu_data.x86) {
+               case 6:
+                       return (msr - MSR_P6_EVNTSEL0);
+               case 15:
+                       return (msr - MSR_P4_BSU_ESCR0);
+               }
+       }
+       return 0;
+
 }
 
 /* checks for a bit availability (hack for oprofile) */
-
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