Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=798fdd07fcc131f396e521febb4a7d42559bf4b5
Commit:     798fdd07fcc131f396e521febb4a7d42559bf4b5
Parent:     da8cadb31b82c9d41fc593c8deab6aa20b162d6b
Author:     Stephen Hemminger <[EMAIL PROTECTED]>
AuthorDate: Fri Dec 7 15:22:15 2007 -0800
Committer:  Jeff Garzik <[EMAIL PROTECTED]>
CommitDate: Fri Dec 14 15:25:47 2007 -0500

    sky2: RX lockup fix
    
    I'm using a Marvell 88E8062 on a custom PPC64 blade and ran into RX
    lockups while validating the sky2 driver.  The receive MAC FIFO would
    become stuck during testing with high traffic.  One port of the 88E8062
    would lockup, while the other port remained functional.  Re-inserting
    the sky2 module would not fix the problem - only a power cycle would.
    
    I looked over Marvell's most recent sk98lin driver and it looks like
    they had a "workaround" for the Yukon XL that the sky2 doesn't have yet.
    The sk98lin driver disables the RX MAC FIFO flush feature for all
    revisions of the Yukon XL.
    
    According to skgeinit.c of the sk98lin driver, "Flushing must be enabled
    (needed for ASF see dev. #4.29), but the flushing mask should be
    disabled (see dev. #4.115)".  Nice. I implemented this same change in
    the sky2 driver and verified that the RX lockup I was seeing was
    resolved.
    
    Signed-off-by: Peter Tyser <[EMAIL PROTECTED]>
    Signed-off-by: Stephen Hemminger <[EMAIL PROTECTED]>
    Signed-off-by: Jeff Garzik <[EMAIL PROTECTED]>
---
 drivers/net/sky2.c |    9 +++++++--
 1 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index 6197afb..a74fc11 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -822,8 +822,13 @@ static void sky2_mac_init(struct sky2_hw *hw, unsigned 
port)
 
        sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), rx_reg);
 
-       /* Flush Rx MAC FIFO on any flow control or error */
-       sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), GMR_FS_ANY_ERR);
+       if (hw->chip_id == CHIP_ID_YUKON_XL) {
+               /* Hardware errata - clear flush mask */
+               sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), 0);
+       } else {
+               /* Flush Rx MAC FIFO on any flow control or error */
+               sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), GMR_FS_ANY_ERR);
+       }
 
        /* Set threshold to 0xa (64 bytes) + 1 to workaround pause bug  */
        reg = RX_GMF_FL_THR_DEF + 1;
-
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