Re: [PATCH 2 of 3] Add MIPS32R2 RDHWR-based cycle counter support

2019-09-11 Thread Torbjörn Granlund
i...@mobile-stream.com writes: Add MIPS32R2 RDHWR-based cycle counter support. Does that work in user mode for all *nix ports? Does it not also work in r3, r4, r5? And r6? Is there are mipsisa64 counterpart? -- Torbjörn Please encrypt, key id 0xC8601622

[PATCH 2 of 3] Add MIPS32R2 RDHWR-based cycle counter support

2019-09-11 Thread info
Add MIPS32R2 RDHWR-based cycle counter support. diff -r 0ba6f9f13912 -r 6ab06c72027e configure.ac --- a/configure.ac +++ b/configure.ac @@ -1035,7 +1035,11 @@ path_64="mips64/hilo mips64" ;; esac - +;; + + mipsisa32r2*-*-*) +

[PATCH 1 of 3] Provide c/l results on some MIPS32 CPUs

2019-09-11 Thread info
Provide c/l results on some MIPS32 CPUs. diff -r ed6ddbb7a15b -r 0ba6f9f13912 mpn/mips32/addmul_1.asm --- a/mpn/mips32/addmul_1.asm +++ b/mpn/mips32/addmul_1.asm @@ -31,6 +31,13 @@ include(`../config.m4') +C cycles/limb +C 4KEc 16.33 +C 24Kc 18.04 +C 24KEc

Re: [PATCH 2 of 3] Add MIPS32R2 RDHWR-based cycle counter support

2019-09-11 Thread Mobile Stream
T> Add MIPS32R2 RDHWR-based cycle counter support. T> Does that work in user mode for all *nix ports? don't know. basing on a quick grep: openbsd, freebsd seem to only allow ULR but never CC/CCRes; netbsd seems to enable everything in HWREna including CC, CCRes. T> Does it not also work in

Re: Suggested tune/tuneup.c patch

2019-09-11 Thread Torbjörn Granlund
And please take a screenshot of the affected parameters before and after this change, as a sanity check. I added a history preservation feature to the .../devel/thres/ pages. At 23:59 each night, all pages are copied to .../devel/thres/-MM-DD. (There is no index, one needs to type in

[PATCH 3 of 3] Add MIPS32R1 MADDU-based *mul_1.asm functions

2019-09-11 Thread info
Add MIPS32R1 MADDU-based *mul_1.asm functions. The code tries to keep the [accidental] property of MIPS-II counterparts: constant-time operation on 32x16 MDUs as found on e.g. 4KEc and some low- end MCUs. Even if that is unimportant, the performance cost is invisible. It is faster on all tried

Re: [PATCH 2 of 3] Add MIPS32R2 RDHWR-based cycle counter support

2019-09-11 Thread Torbjörn Granlund
Mobile Stream writes: T> Add MIPS32R2 RDHWR-based cycle counter support. T> Does that work in user mode for all *nix ports? don't know. basing on a quick grep: openbsd, freebsd seem to only allow ULR but never CC/CCRes; netbsd seems to enable everything in HWREna including CC,

Re: Suggested tune/tuneup.c patch

2019-09-11 Thread Torbjörn Granlund
ni...@lysator.liu.se (Niels Möller) writes: Below patch adds a helper function for tuning *_METHOD values, evaluated at some fix size. What do you think? It helps with some function comments, outlining what a function does, and what its arguments mean. Please consider adding that before

Re: hgcd1/2

2019-09-11 Thread Torbjörn Granlund
ni...@lysator.liu.se (Niels Möller) writes: Sounds good. Give it a few days, and delete if it still looks slow everywhere. I cooked a modern alternative: static mp_double_limb_t div1 (mp_limb_t n0, mp_limb_t d0) { mp_double_limb_t res; int ncnt, dcnt, cnt; mp_limb_t q; mp_limb_t