Hello thereI'm facing an issue with hwloc 1.5.3 (old, i know, but it's the stock centos 6 package) in that a single node emits this message whenever i run any MPI-enabled program.
**************************************************************************** * Hwloc has encountered what looks like an error from the operating system. * * object (Socket P#0 cpuset 0x0000ffff) intersection without inclusion! * Error occurred in topology.c line 718 * * Please report this error message to the hwloc user's mailing list, * along with the output from the hwloc-gather-topology.sh script. ****************************************************************************This happen only in one node. Other similar nodes (same hardware, same OS, same software) run fine. The OS is centos 6.5 x86_64.
In the attachments, 'compute-0-0' is the healthy node, 'compute-0-12' is the quirky one.
Is it possible to point the faulty hardware from the attached outputs ? TIA, Fabricio
Machine (P#0 total=134199224KB DMIProductName="AS -1042G-LTF"
DMIProductVersion=1234567890 DMIBoardVendor=Supermicro DMIBoardName=H8QGL
DMIBoardVersion=1234567890 DMIBoardAssetTag=1234567890
DMIChassisVendor=Supermicro DMIChassisType=1 DMIChassisVersion=1234567890
DMIChassisAssetTag=1234567890 DMIBIOSVendor="American Megatrends Inc."
DMIBIOSVersion="3.0a " DMIBIOSDate=02/01/2013 DMISysVendor=Supermicro
Backend=Linux)
Socket L#0 (P#0 total=33552312KB CPUModel="AMD Opteron(tm) Processor 6376
")
NUMANode L#0 (P#0 local=16775096KB total=16775096KB)
L3Cache L#0 (size=6144KB linesize=64 ways=64)
L2Cache L#0 (size=2048KB linesize=64 ways=16)
L1iCache L#0 (size=64KB linesize=64 ways=2)
L1dCache L#0 (size=16KB linesize=64 ways=4)
Core L#0 (P#0)
PU L#0 (P#0)
L1dCache L#1 (size=16KB linesize=64 ways=4)
Core L#1 (P#1)
PU L#1 (P#1)
L2Cache L#1 (size=2048KB linesize=64 ways=16)
L1iCache L#1 (size=64KB linesize=64 ways=2)
L1dCache L#2 (size=16KB linesize=64 ways=4)
Core L#2 (P#2)
PU L#2 (P#2)
L1dCache L#3 (size=16KB linesize=64 ways=4)
Core L#3 (P#3)
PU L#3 (P#3)
L2Cache L#2 (size=2048KB linesize=64 ways=16)
L1iCache L#2 (size=64KB linesize=64 ways=2)
L1dCache L#4 (size=16KB linesize=64 ways=4)
Core L#4 (P#4)
PU L#4 (P#4)
L1dCache L#5 (size=16KB linesize=64 ways=4)
Core L#5 (P#5)
PU L#5 (P#5)
L2Cache L#3 (size=2048KB linesize=64 ways=16)
L1iCache L#3 (size=64KB linesize=64 ways=2)
L1dCache L#6 (size=16KB linesize=64 ways=4)
Core L#6 (P#6)
PU L#6 (P#6)
L1dCache L#7 (size=16KB linesize=64 ways=4)
Core L#7 (P#7)
PU L#7 (P#7)
NUMANode L#1 (P#1 local=16777216KB total=16777216KB)
L3Cache L#1 (size=6144KB linesize=64 ways=64)
L2Cache L#4 (size=2048KB linesize=64 ways=16)
L1iCache L#4 (size=64KB linesize=64 ways=2)
L1dCache L#8 (size=16KB linesize=64 ways=4)
Core L#8 (P#0)
PU L#8 (P#8)
L1dCache L#9 (size=16KB linesize=64 ways=4)
Core L#9 (P#1)
PU L#9 (P#9)
L2Cache L#5 (size=2048KB linesize=64 ways=16)
L1iCache L#5 (size=64KB linesize=64 ways=2)
L1dCache L#10 (size=16KB linesize=64 ways=4)
Core L#10 (P#2)
PU L#10 (P#10)
L1dCache L#11 (size=16KB linesize=64 ways=4)
Core L#11 (P#3)
PU L#11 (P#11)
L2Cache L#6 (size=2048KB linesize=64 ways=16)
L1iCache L#6 (size=64KB linesize=64 ways=2)
L1dCache L#12 (size=16KB linesize=64 ways=4)
Core L#12 (P#4)
PU L#12 (P#12)
L1dCache L#13 (size=16KB linesize=64 ways=4)
Core L#13 (P#5)
PU L#13 (P#13)
L2Cache L#7 (size=2048KB linesize=64 ways=16)
L1iCache L#7 (size=64KB linesize=64 ways=2)
L1dCache L#14 (size=16KB linesize=64 ways=4)
Core L#14 (P#6)
PU L#14 (P#14)
L1dCache L#15 (size=16KB linesize=64 ways=4)
Core L#15 (P#7)
PU L#15 (P#15)
Socket L#1 (P#1 total=33554432KB CPUModel="AMD Opteron(tm) Processor 6376
")
NUMANode L#2 (P#2 local=16777216KB total=16777216KB)
L3Cache L#2 (size=6144KB linesize=64 ways=64)
L2Cache L#8 (size=2048KB linesize=64 ways=16)
L1iCache L#8 (size=64KB linesize=64 ways=2)
L1dCache L#16 (size=16KB linesize=64 ways=4)
Core L#16 (P#0)
PU L#16 (P#16)
L1dCache L#17 (size=16KB linesize=64 ways=4)
Core L#17 (P#1)
PU L#17 (P#17)
L2Cache L#9 (size=2048KB linesize=64 ways=16)
L1iCache L#9 (size=64KB linesize=64 ways=2)
L1dCache L#18 (size=16KB linesize=64 ways=4)
Core L#18 (P#2)
PU L#18 (P#18)
L1dCache L#19 (size=16KB linesize=64 ways=4)
Core L#19 (P#3)
PU L#19 (P#19)
L2Cache L#10 (size=2048KB linesize=64 ways=16)
L1iCache L#10 (size=64KB linesize=64 ways=2)
L1dCache L#20 (size=16KB linesize=64 ways=4)
Core L#20 (P#4)
PU L#20 (P#20)
L1dCache L#21 (size=16KB linesize=64 ways=4)
Core L#21 (P#5)
PU L#21 (P#21)
L2Cache L#11 (size=2048KB linesize=64 ways=16)
L1iCache L#11 (size=64KB linesize=64 ways=2)
L1dCache L#22 (size=16KB linesize=64 ways=4)
Core L#22 (P#6)
PU L#22 (P#22)
L1dCache L#23 (size=16KB linesize=64 ways=4)
Core L#23 (P#7)
PU L#23 (P#23)
NUMANode L#3 (P#3 local=16777216KB total=16777216KB)
L3Cache L#3 (size=6144KB linesize=64 ways=64)
L2Cache L#12 (size=2048KB linesize=64 ways=16)
L1iCache L#12 (size=64KB linesize=64 ways=2)
L1dCache L#24 (size=16KB linesize=64 ways=4)
Core L#24 (P#0)
PU L#24 (P#24)
L1dCache L#25 (size=16KB linesize=64 ways=4)
Core L#25 (P#1)
PU L#25 (P#25)
L2Cache L#13 (size=2048KB linesize=64 ways=16)
L1iCache L#13 (size=64KB linesize=64 ways=2)
L1dCache L#26 (size=16KB linesize=64 ways=4)
Core L#26 (P#2)
PU L#26 (P#26)
L1dCache L#27 (size=16KB linesize=64 ways=4)
Core L#27 (P#3)
PU L#27 (P#27)
L2Cache L#14 (size=2048KB linesize=64 ways=16)
L1iCache L#14 (size=64KB linesize=64 ways=2)
L1dCache L#28 (size=16KB linesize=64 ways=4)
Core L#28 (P#4)
PU L#28 (P#28)
L1dCache L#29 (size=16KB linesize=64 ways=4)
Core L#29 (P#5)
PU L#29 (P#29)
L2Cache L#15 (size=2048KB linesize=64 ways=16)
L1iCache L#15 (size=64KB linesize=64 ways=2)
L1dCache L#30 (size=16KB linesize=64 ways=4)
Core L#30 (P#6)
PU L#30 (P#30)
L1dCache L#31 (size=16KB linesize=64 ways=4)
Core L#31 (P#7)
PU L#31 (P#31)
Socket L#2 (P#2 total=33554432KB CPUModel="AMD Opteron(tm) Processor 6376
")
NUMANode L#4 (P#4 local=16777216KB total=16777216KB)
L3Cache L#4 (size=6144KB linesize=64 ways=64)
L2Cache L#16 (size=2048KB linesize=64 ways=16)
L1iCache L#16 (size=64KB linesize=64 ways=2)
L1dCache L#32 (size=16KB linesize=64 ways=4)
Core L#32 (P#0)
PU L#32 (P#32)
L1dCache L#33 (size=16KB linesize=64 ways=4)
Core L#33 (P#1)
PU L#33 (P#33)
L2Cache L#17 (size=2048KB linesize=64 ways=16)
L1iCache L#17 (size=64KB linesize=64 ways=2)
L1dCache L#34 (size=16KB linesize=64 ways=4)
Core L#34 (P#2)
PU L#34 (P#34)
L1dCache L#35 (size=16KB linesize=64 ways=4)
Core L#35 (P#3)
PU L#35 (P#35)
L2Cache L#18 (size=2048KB linesize=64 ways=16)
L1iCache L#18 (size=64KB linesize=64 ways=2)
L1dCache L#36 (size=16KB linesize=64 ways=4)
Core L#36 (P#4)
PU L#36 (P#36)
L1dCache L#37 (size=16KB linesize=64 ways=4)
Core L#37 (P#5)
PU L#37 (P#37)
L2Cache L#19 (size=2048KB linesize=64 ways=16)
L1iCache L#19 (size=64KB linesize=64 ways=2)
L1dCache L#38 (size=16KB linesize=64 ways=4)
Core L#38 (P#6)
PU L#38 (P#38)
L1dCache L#39 (size=16KB linesize=64 ways=4)
Core L#39 (P#7)
PU L#39 (P#39)
NUMANode L#5 (P#5 local=16777216KB total=16777216KB)
L3Cache L#5 (size=6144KB linesize=64 ways=64)
L2Cache L#20 (size=2048KB linesize=64 ways=16)
L1iCache L#20 (size=64KB linesize=64 ways=2)
L1dCache L#40 (size=16KB linesize=64 ways=4)
Core L#40 (P#0)
PU L#40 (P#40)
L1dCache L#41 (size=16KB linesize=64 ways=4)
Core L#41 (P#1)
PU L#41 (P#41)
L2Cache L#21 (size=2048KB linesize=64 ways=16)
L1iCache L#21 (size=64KB linesize=64 ways=2)
L1dCache L#42 (size=16KB linesize=64 ways=4)
Core L#42 (P#2)
PU L#42 (P#42)
L1dCache L#43 (size=16KB linesize=64 ways=4)
Core L#43 (P#3)
PU L#43 (P#43)
L2Cache L#22 (size=2048KB linesize=64 ways=16)
L1iCache L#22 (size=64KB linesize=64 ways=2)
L1dCache L#44 (size=16KB linesize=64 ways=4)
Core L#44 (P#4)
PU L#44 (P#44)
L1dCache L#45 (size=16KB linesize=64 ways=4)
Core L#45 (P#5)
PU L#45 (P#45)
L2Cache L#23 (size=2048KB linesize=64 ways=16)
L1iCache L#23 (size=64KB linesize=64 ways=2)
L1dCache L#46 (size=16KB linesize=64 ways=4)
Core L#46 (P#6)
PU L#46 (P#46)
L1dCache L#47 (size=16KB linesize=64 ways=4)
Core L#47 (P#7)
PU L#47 (P#47)
Socket L#3 (P#3 total=33538048KB CPUModel="AMD Opteron(tm) Processor 6376
")
NUMANode L#6 (P#6 local=16777216KB total=16777216KB)
L3Cache L#6 (size=6144KB linesize=64 ways=64)
L2Cache L#24 (size=2048KB linesize=64 ways=16)
L1iCache L#24 (size=64KB linesize=64 ways=2)
L1dCache L#48 (size=16KB linesize=64 ways=4)
Core L#48 (P#0)
PU L#48 (P#48)
L1dCache L#49 (size=16KB linesize=64 ways=4)
Core L#49 (P#1)
PU L#49 (P#49)
L2Cache L#25 (size=2048KB linesize=64 ways=16)
L1iCache L#25 (size=64KB linesize=64 ways=2)
L1dCache L#50 (size=16KB linesize=64 ways=4)
Core L#50 (P#2)
PU L#50 (P#50)
L1dCache L#51 (size=16KB linesize=64 ways=4)
Core L#51 (P#3)
PU L#51 (P#51)
L2Cache L#26 (size=2048KB linesize=64 ways=16)
L1iCache L#26 (size=64KB linesize=64 ways=2)
L1dCache L#52 (size=16KB linesize=64 ways=4)
Core L#52 (P#4)
PU L#52 (P#52)
L1dCache L#53 (size=16KB linesize=64 ways=4)
Core L#53 (P#5)
PU L#53 (P#53)
L2Cache L#27 (size=2048KB linesize=64 ways=16)
L1iCache L#27 (size=64KB linesize=64 ways=2)
L1dCache L#54 (size=16KB linesize=64 ways=4)
Core L#54 (P#6)
PU L#54 (P#54)
L1dCache L#55 (size=16KB linesize=64 ways=4)
Core L#55 (P#7)
PU L#55 (P#55)
NUMANode L#7 (P#7 local=16760832KB total=16760832KB)
L3Cache L#7 (size=6144KB linesize=64 ways=64)
L2Cache L#28 (size=2048KB linesize=64 ways=16)
L1iCache L#28 (size=64KB linesize=64 ways=2)
L1dCache L#56 (size=16KB linesize=64 ways=4)
Core L#56 (P#0)
PU L#56 (P#56)
L1dCache L#57 (size=16KB linesize=64 ways=4)
Core L#57 (P#1)
PU L#57 (P#57)
L2Cache L#29 (size=2048KB linesize=64 ways=16)
L1iCache L#29 (size=64KB linesize=64 ways=2)
L1dCache L#58 (size=16KB linesize=64 ways=4)
Core L#58 (P#2)
PU L#58 (P#58)
L1dCache L#59 (size=16KB linesize=64 ways=4)
Core L#59 (P#3)
PU L#59 (P#59)
L2Cache L#30 (size=2048KB linesize=64 ways=16)
L1iCache L#30 (size=64KB linesize=64 ways=2)
L1dCache L#60 (size=16KB linesize=64 ways=4)
Core L#60 (P#4)
PU L#60 (P#60)
L1dCache L#61 (size=16KB linesize=64 ways=4)
Core L#61 (P#5)
PU L#61 (P#61)
L2Cache L#31 (size=2048KB linesize=64 ways=16)
L1iCache L#31 (size=64KB linesize=64 ways=2)
L1dCache L#62 (size=16KB linesize=64 ways=4)
Core L#62 (P#6)
PU L#62 (P#62)
L1dCache L#63 (size=16KB linesize=64 ways=4)
Core L#63 (P#7)
PU L#63 (P#63)
depth 0: 1 Machine (type #1)
depth 1: 4 Socket (type #3)
depth 2: 8 NUMANode (type #2)
depth 3: 8 L3Cache (type #4)
depth 4: 32 L2Cache (type #4)
depth 5: 32 L1iCache (type #4)
depth 6: 64 L1dCache (type #4)
depth 7: 64 Core (type #5)
depth 8: 64 PU (type #6)
latency matrix between NUMANodes (depth 2) by logical indexes:
index 0 1 2 3 4 5 6 7
0 1.000 1.600 1.600 2.200 1.600 2.200 1.600 2.200
1 1.600 1.000 2.200 1.600 2.200 1.600 2.200 1.600
2 1.600 2.200 1.000 1.600 1.600 2.200 1.600 2.200
3 2.200 1.600 1.600 1.000 2.200 1.600 2.200 1.600
4 1.600 2.200 1.600 2.200 1.000 1.600 1.600 2.200
5 2.200 1.600 2.200 1.600 1.600 1.000 2.200 1.600
6 1.600 2.200 1.600 2.200 1.600 2.200 1.000 1.600
7 2.200 1.600 2.200 1.600 2.200 1.600 1.600 1.000
Topology not from this system
compute-0-0.tar.bz2
Description: Binary data
Machine (P#0 total=134199224KB DMIProductName=H8QG6
DMIProductVersion=1234567890 DMIBoardVendor=Supermicro DMIBoardName=H8QG6
DMIBoardVersion=1234567890 DMIBoardAssetTag=1234567890
DMIChassisVendor=Supermicro DMIChassisType=17 DMIChassisVersion=1234567890
DMIChassisAssetTag=1234567890 DMIBIOSVendor="American Megatrends Inc."
DMIBIOSVersion="3.5 " DMIBIOSDate=12/16/2013 DMISysVendor=Supermicro
Backend=Linux)
NUMANode L#0 (P#0 local=33552312KB total=33552312KB)
L3Cache L#0 (size=6144KB linesize=64 ways=64)
L2Cache L#0 (size=2048KB linesize=64 ways=16)
L1iCache L#0 (size=64KB linesize=64 ways=2)
L1dCache L#0 (size=16KB linesize=64 ways=4)
Core L#0 (P#0)
PU L#0 (P#0)
L1dCache L#1 (size=16KB linesize=64 ways=4)
Core L#1 (P#1)
PU L#1 (P#1)
L2Cache L#1 (size=2048KB linesize=64 ways=16)
L1iCache L#1 (size=64KB linesize=64 ways=2)
L1dCache L#2 (size=16KB linesize=64 ways=4)
Core L#2 (P#2)
PU L#2 (P#2)
L1dCache L#3 (size=16KB linesize=64 ways=4)
Core L#3 (P#3)
PU L#3 (P#3)
L2Cache L#2 (size=2048KB linesize=64 ways=16)
L1iCache L#2 (size=64KB linesize=64 ways=2)
L1dCache L#4 (size=16KB linesize=64 ways=4)
Core L#4 (P#4)
PU L#4 (P#4)
L1dCache L#5 (size=16KB linesize=64 ways=4)
Core L#5 (P#5)
PU L#5 (P#5)
L2Cache L#3 (size=2048KB linesize=64 ways=16)
L1iCache L#3 (size=64KB linesize=64 ways=2)
L1dCache L#6 (size=16KB linesize=64 ways=4)
Core L#6 (P#6)
PU L#6 (P#6)
L1dCache L#7 (size=16KB linesize=64 ways=4)
Core L#7 (P#7)
PU L#7 (P#7)
NUMANode L#1 (P#1 local=33554432KB total=33554432KB)
L3Cache L#1 (size=6144KB linesize=64 ways=64)
L2Cache L#4 (size=2048KB linesize=64 ways=16)
L1iCache L#4 (size=64KB linesize=64 ways=2)
L1dCache L#8 (size=16KB linesize=64 ways=4)
Core L#8 (P#0)
PU L#8 (P#8)
L1dCache L#9 (size=16KB linesize=64 ways=4)
Core L#9 (P#1)
PU L#9 (P#9)
L2Cache L#5 (size=2048KB linesize=64 ways=16)
L1iCache L#5 (size=64KB linesize=64 ways=2)
L1dCache L#10 (size=16KB linesize=64 ways=4)
Core L#10 (P#2)
PU L#10 (P#10)
L1dCache L#11 (size=16KB linesize=64 ways=4)
Core L#11 (P#3)
PU L#11 (P#11)
L2Cache L#6 (size=2048KB linesize=64 ways=16)
L1iCache L#6 (size=64KB linesize=64 ways=2)
L1dCache L#12 (size=16KB linesize=64 ways=4)
Core L#12 (P#4)
PU L#12 (P#12)
L1dCache L#13 (size=16KB linesize=64 ways=4)
Core L#13 (P#5)
PU L#13 (P#13)
L2Cache L#7 (size=2048KB linesize=64 ways=16)
L1iCache L#7 (size=64KB linesize=64 ways=2)
L1dCache L#14 (size=16KB linesize=64 ways=4)
Core L#14 (P#6)
PU L#14 (P#14)
L1dCache L#15 (size=16KB linesize=64 ways=4)
Core L#15 (P#7)
PU L#15 (P#15)
L3Cache L#2 (size=6144KB linesize=64 ways=64)
L2Cache L#8 (size=2048KB linesize=64 ways=16)
L1iCache L#8 (size=64KB linesize=64 ways=2)
L1dCache L#16 (size=16KB linesize=64 ways=4)
Core L#16 (P#0)
PU L#16 (P#24)
L1dCache L#17 (size=16KB linesize=64 ways=4)
Core L#17 (P#1)
PU L#17 (P#25)
L2Cache L#9 (size=2048KB linesize=64 ways=16)
L1iCache L#9 (size=64KB linesize=64 ways=2)
L1dCache L#18 (size=16KB linesize=64 ways=4)
Core L#18 (P#2)
PU L#18 (P#26)
L1dCache L#19 (size=16KB linesize=64 ways=4)
Core L#19 (P#3)
PU L#19 (P#27)
L2Cache L#10 (size=2048KB linesize=64 ways=16)
L1iCache L#10 (size=64KB linesize=64 ways=2)
L1dCache L#20 (size=16KB linesize=64 ways=4)
Core L#20 (P#4)
PU L#20 (P#28)
L1dCache L#21 (size=16KB linesize=64 ways=4)
Core L#21 (P#5)
PU L#21 (P#29)
L2Cache L#11 (size=2048KB linesize=64 ways=16)
L1iCache L#11 (size=64KB linesize=64 ways=2)
L1dCache L#22 (size=16KB linesize=64 ways=4)
Core L#22 (P#6)
PU L#22 (P#30)
L1dCache L#23 (size=16KB linesize=64 ways=4)
Core L#23 (P#7)
PU L#23 (P#31)
NUMANode L#2 (P#2 local=33554432KB total=33554432KB)
L3Cache L#3 (size=6144KB linesize=64 ways=64)
L2Cache L#12 (size=2048KB linesize=64 ways=16)
L1iCache L#12 (size=64KB linesize=64 ways=2)
L1dCache L#24 (size=16KB linesize=64 ways=4)
Core L#24 (P#0)
PU L#24 (P#16)
L1dCache L#25 (size=16KB linesize=64 ways=4)
Core L#25 (P#1)
PU L#25 (P#17)
L2Cache L#13 (size=2048KB linesize=64 ways=16)
L1iCache L#13 (size=64KB linesize=64 ways=2)
L1dCache L#26 (size=16KB linesize=64 ways=4)
Core L#26 (P#2)
PU L#26 (P#18)
L1dCache L#27 (size=16KB linesize=64 ways=4)
Core L#27 (P#3)
PU L#27 (P#19)
L2Cache L#14 (size=2048KB linesize=64 ways=16)
L1iCache L#14 (size=64KB linesize=64 ways=2)
L1dCache L#28 (size=16KB linesize=64 ways=4)
Core L#28 (P#4)
PU L#28 (P#20)
L1dCache L#29 (size=16KB linesize=64 ways=4)
Core L#29 (P#5)
PU L#29 (P#21)
L2Cache L#15 (size=2048KB linesize=64 ways=16)
L1iCache L#15 (size=64KB linesize=64 ways=2)
L1dCache L#30 (size=16KB linesize=64 ways=4)
Core L#30 (P#6)
PU L#30 (P#22)
L1dCache L#31 (size=16KB linesize=64 ways=4)
Core L#31 (P#7)
PU L#31 (P#23)
NUMANode L#3 (P#4 local=33538048KB total=33538048KB)
Socket L#0 (P#2 CPUModel="AMD Opteron(tm) Processor 6376 ")
L3Cache L#4 (size=6144KB linesize=64 ways=64)
L2Cache L#16 (size=2048KB linesize=64 ways=16)
L1iCache L#16 (size=64KB linesize=64 ways=2)
L1dCache L#32 (size=16KB linesize=64 ways=4)
Core L#32 (P#0)
PU L#32 (P#32)
L1dCache L#33 (size=16KB linesize=64 ways=4)
Core L#33 (P#1)
PU L#33 (P#33)
L2Cache L#17 (size=2048KB linesize=64 ways=16)
L1iCache L#17 (size=64KB linesize=64 ways=2)
L1dCache L#34 (size=16KB linesize=64 ways=4)
Core L#34 (P#2)
PU L#34 (P#34)
L1dCache L#35 (size=16KB linesize=64 ways=4)
Core L#35 (P#3)
PU L#35 (P#35)
L2Cache L#18 (size=2048KB linesize=64 ways=16)
L1iCache L#18 (size=64KB linesize=64 ways=2)
L1dCache L#36 (size=16KB linesize=64 ways=4)
Core L#36 (P#4)
PU L#36 (P#36)
L1dCache L#37 (size=16KB linesize=64 ways=4)
Core L#37 (P#5)
PU L#37 (P#37)
L2Cache L#19 (size=2048KB linesize=64 ways=16)
L1iCache L#19 (size=64KB linesize=64 ways=2)
L1dCache L#38 (size=16KB linesize=64 ways=4)
Core L#38 (P#6)
PU L#38 (P#38)
L1dCache L#39 (size=16KB linesize=64 ways=4)
Core L#39 (P#7)
PU L#39 (P#39)
L3Cache L#5 (size=6144KB linesize=64 ways=64)
L2Cache L#20 (size=2048KB linesize=64 ways=16)
L1iCache L#20 (size=64KB linesize=64 ways=2)
L1dCache L#40 (size=16KB linesize=64 ways=4)
Core L#40 (P#0)
PU L#40 (P#40)
L1dCache L#41 (size=16KB linesize=64 ways=4)
Core L#41 (P#1)
PU L#41 (P#41)
L2Cache L#21 (size=2048KB linesize=64 ways=16)
L1iCache L#21 (size=64KB linesize=64 ways=2)
L1dCache L#42 (size=16KB linesize=64 ways=4)
Core L#42 (P#2)
PU L#42 (P#42)
L1dCache L#43 (size=16KB linesize=64 ways=4)
Core L#43 (P#3)
PU L#43 (P#43)
L2Cache L#22 (size=2048KB linesize=64 ways=16)
L1iCache L#22 (size=64KB linesize=64 ways=2)
L1dCache L#44 (size=16KB linesize=64 ways=4)
Core L#44 (P#4)
PU L#44 (P#44)
L1dCache L#45 (size=16KB linesize=64 ways=4)
Core L#45 (P#5)
PU L#45 (P#45)
L2Cache L#23 (size=2048KB linesize=64 ways=16)
L1iCache L#23 (size=64KB linesize=64 ways=2)
L1dCache L#46 (size=16KB linesize=64 ways=4)
Core L#46 (P#6)
PU L#46 (P#46)
L1dCache L#47 (size=16KB linesize=64 ways=4)
Core L#47 (P#7)
PU L#47 (P#47)
depth 0: 1 Machine (type #1)
depth 1: 4 NUMANode (type #2)
depth 2: 1 Socket (type #3)
depth 3: 6 L3Cache (type #4)
depth 4: 24 L2Cache (type #4)
depth 5: 24 L1iCache (type #4)
depth 6: 48 L1dCache (type #4)
depth 7: 48 Core (type #5)
depth 8: 48 PU (type #6)
latency matrix between NUMANodes (depth 1) by logical indexes:
index 0 1 2 3
0 1.000 1.600 1.600 1.600
1 1.600 1.000 2.200 2.200
2 1.600 2.200 1.000 1.600
3 1.600 2.200 1.600 1.000
Topology not from this system
compute-0-12.tar.bz2
Description: Binary data
