Re: Is there a source for detailed, instruction-level performance info?

Sweet. This would have saved me hours of sleeplessness--or at least fitful sleep--in the ensuing decades. ;-) If the business ever turned out to be so successful as to exceed two billion records of any type, this report would have been a joy to (re)write yet again. . . . J.O.Skip Robinson

Re: Is there a source for detailed, instruction-level performance info?

On Sun, 27 Dec 2015 13:21:23 -0800, Anne & Lynn Wheeler wrote: >later, newer memory for 370/168 was less expensive ... and started to >see four mbytes as much more common ... aka four mbytes as 370/165 would >have met that typical MVT customer could have gotten 16 regions ... w/o >having to

Re: Is there a source for detailed, instruction-level performance info?

shmuel+ibm-m...@patriot.net (Shmuel Metz , Seymour J.) writes: > We ran more than that, plus TSO, on a 2 MiB machine. IBM executives were looking at 370/165 ... where typical customer had 1mbyte ... in part because 165 real memory was very expensive ... and typical regions were such that they

Re: Is there a source for detailed, instruction-level performance info?

In <87bn9fwuo0@garlic.com>, on 12/24/2015 at 10:47 AM, Anne & Lynn Wheeler said: >As a result, a typical 1mbyte 370/165 would only have four regions. We ran more than that, plus TSO, on a 2 MiB machine. -- Shmuel (Seymour J.) Metz, SysProg and JOAT ISO

Re: Is there a source for detailed, instruction-level performance info?

In , on 12/24/2015 at 02:31 PM, Mike Schwab said: >https://en.wikipedia.org/wiki/IBM_7030_Stretch >First computer to implement: Multiprogramming, memory protection, >generalized interrupts, the

Re: Is there a source for detailed, instruction-level performance info?

In <013c01d13e5a$89687c80$9c397580$@mcn.org>, on 12/24/2015 at 06:51 AM, Charles Mills said: >This is true so much that the z13 processors implement a kind of >"internal multiprogramming" IBM calls it Simultaneous Multi-threading, except in PoOps where it is just

Re: Is there a source for detailed, instruction-level performance info?

In , on 12/25/2015 at 01:23 AM, "Robert A. Rosenberg" said: >This story (and the others) reminds me of an incident that occurred >early in my programming life. The clasic example is Multics. Early on they redesigned the file system,

Re: Is there a source for detailed, instruction-level performance info?

In <567b4a30.8050...@yahoo.com>, on 12/23/2015 at 08:28 PM, Thomas Kern <0041d919e708-dmarc-requ...@listserv.ua.edu> said: >Perhaps what might be useful would be an assembler program to run >loops of individual instructions and output some timing >information. That would work on a

Re: Is there a source for detailed, instruction-level performance info?

On 27 December 2015 at 14:47, Skip Robinson wrote: > As a newbie, I got curious about the relative speed of these strategies: > > 1. L R15, COUNTER > 2. A R15,=F(+1) > 3. ST R15, COUNTER > > 1. L R15, COUNTER > 2. LA R15,1(,R15) > 3. ST R15, COUNTER > > I asked my

Re: Is there a source for detailed, instruction-level performance info?

Ahead of New Year's resolution mania, I have to confess to a questionable decision dating back to my absolute first IT job as a programmer trainee. The company was TRW Credit Data, ancestor of Experian. The application was Business Credit, which performed B2B reporting analogous to consumer

Re: Is there a source for detailed, instruction-level performance info?

In , on 12/27/2015 at 03:14 PM, Tony Harminc said: >There's a third model for this very common operation: >LAR15,1 >A R15,COUNTER >STR15,COUNTER If you're that concerned about speed:

Re: Is there a source for detailed, instruction-level performance info?

> >LAR15,1 > >A R15,COUNTER > >STR15,COUNTER > > If you're that concerned about speed: > > LAR11,1 > LOOP GET foo > logic to determine type > L Rl,COUNTER > ARR1,R11 > STR1,COUNTER > B LOOP And on