Re: How to set a SLIP to catch S0C4 in OMVS separate AS

2023-07-15 Thread Colin Paice
How about SLIP SET,COMP=0c4,ACTION=SVCD and do not specify any address space etc Colin On Sat, 15 Jul 2023 at 01:17, Farley, Peter < 031df298a9da-dmarc-requ...@listserv.ua.edu> wrote: > Hi All, > > I am trying to help the python ibmdb team help me solve an S0C4 abend > issue with (we think

Re: A question about CPU usage on z/OS

2023-07-15 Thread Joel C. Ewing
The SU/sec advertised for those models indicates it is correct to call a 504 cpu "slower" than a 701 cpu, even if that distinction is created at a level above the physical hardware.  If it is true that at the hardware level the processor clock cycle is identical for all processors, then

Re: A question about CPU usage on z/OS

2023-07-15 Thread rpinion865
Anyone remember "wait states" in the early IBM/clone 8088 PC's because of the slower memory chips? Sent from Proton Mail mobile Original Message On Jul 15, 2023, 2:41 PM, Joel C. Ewing wrote: > The SU/sec advertised for those models indicates it is correct to call a 504 >

Re: How to set a SLIP to catch S0C4 in OMVS separate AS

2023-07-15 Thread Farley, Peter
Thanks for trying to help Jon, but “IBM” hasn’t *officially* looked at anything. The python ibmdb team is an open source collective (perhaps including some IBM employees, but I do not know that for sure) and is not “official” IBM support at all. One of the ibmdb team has asked for an SVCDUMP

Re: How to set a SLIP to catch S0C4 in OMVS separate AS

2023-07-15 Thread Farley, Peter
Follow-up: The python code that abends is already using try/except around the calls to the fetch_both() function, and the “except” phrase is never executed (I already have message outputs there, though not to /dev/console), so there is no chance to output anything after the abend happens. So

Re: Basic VM/CMS question (GENMOD)

2023-07-15 Thread Bernd Oppolzer
Thank you very much ... I have legacy code here which is from 1979 and 1982, and the primary targets are VM/370 and MVS 3.8, but I'm very happy that it runs on current z/OS and current z/VM, too ... and it will sure run after some minor corrections also from "real" MODULEs and not only via LOAD

Re: A question about CPU usage on z/OS

2023-07-15 Thread P H
All processing units (PUs), whether CPs zIIPs, SAPs, ICFs or IFLs have the SAME cycle time (speed). It's the CAPACITY settings which are different. For example, in case of the z16 the 701 is 100% then the relative capacity of a 601 is approx 66% of the 701, 501 is approx 41% of the 701 and 401

Re: Userid schemes

2023-07-15 Thread P H
At one time, many moons ago, IBM systems which used the employee number for the userid, the world-wide 'uniqueness' was simple by prefixing the employee number by the letters GB (Great Britain) or IBM's oountry code for countries it operated in e.g. 866 for Great Britain. Regards Parwez

Re: Change how LE allocates storage (subpool,key)

2023-07-15 Thread Martin Trübner
I believe "Storage-protection override" is the hardware facility it is! and VSE as well as z/OS set the bit in CR0 to activate it (all the time without asking for any need). So Key 9 is the storage key everyone (regardless of key) can modify as opposed to PSW-key zero which allows to modify

Re: Change how LE allocates storage (subpool,key)

2023-07-15 Thread Tony Harminc
On Fri, 14 Jul 2023 at 20:54, Steve Thompson wrote: [...] > I wrote the SVC for PROLOG and was in the middle of testing when > we were informed that CICS was going to use KEY9 and a system > change (forgot the name of this) was being done for them. So I > had to find another key. I believe

Re: How to set a SLIP to catch S0C4 in OMVS separate AS

2023-07-15 Thread Jon Perryman
As you discovered, S0C4 SLIPs are at the best of times a pain in the a$$. S0C4 is difficult because it has a real use which is to determine if a page has been created (not just allocated). It requires multiple SLIP IGNORE which can be obtained from IBM. Since you are working with IBM support,

Re: How to set a SLIP to catch S0C4 in OMVS separate AS

2023-07-15 Thread Seymour J Metz
A paging exception for an allocated page doesn't cause an S0C4, although a reference to an unallocated page does. I would expect a lot more of the former than the latter. Has anybody compiled metrics? From: IBM Mainframe Discussion List on behalf of Jon

Re: A question about CPU usage on z/OS

2023-07-15 Thread Seymour J Metz
It's a bit more complicated. A TCB is eligible if is dispatchable and its current RB has a 0 wait count. From: IBM Mainframe Discussion List on behalf of Jon Perryman Sent: Saturday, July 15, 2023 12:41 AM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: A

Re: How to set a SLIP to catch S0C4 in OMVS separate AS

2023-07-15 Thread Peter Relson
What SLIP trap did you try setting? SLIP SET,C=0C4,A=SVCD,END will catch every 0C4 that occurs anywhere. That wouldn't be what I'd want for a SLIP trap (it's too broad so will hit on things you don't want). But it would work. But only once (default match limit for A=SVCD is one). Either there

Re: How to set a SLIP to catch S0C4 in OMVS separate AS

2023-07-15 Thread David Crayford
Are you sure you don’t have a dump? LE is usually configured with TERMTHDACT(UADUMP) which creates a transaction (SYSMDUMP). Look in the syslog. Set the following environment variable to enable dumps by default. export _CEE_RUNOPTS=FILETAG(AUTOCVT,AUTOTAG) TERMTHDACT(UADUMP) ABTERMENC(ABEND)

Re: How to set a SLIP to catch S0C4 in OMVS separate AS

2023-07-15 Thread Charles Hardee
I wouldn't call myself a SLIP expert, but I do a lot of SLIPs during software development. Consider something like the private module parm of SLIP. You would use something like P=TOROLABA. Do you get registers when you get the S0C4? If you do, find the one that contains the base address and use

Re: How to set a SLIP to catch S0C4 in OMVS separate AS

2023-07-15 Thread Jon Perryman
I don't think TOROLABA is a module name. Complete guess on my part but Peter is using zXplore which makes me think this is something to do with labs as in TORO LAB A. Does python on z compile an actual executable or is it more akin to a bytecode generator? The message implies something like

Re: How to set a SLIP to catch S0C4 in OMVS separate AS

2023-07-15 Thread Jon Perryman
The SLIP I recommended was to capture the system trace which will not solve your problem but would give you information about setting a slip to capture the you need. S0C4 SVCDUMP is notoriously difficult to capture. Since the error message contains the abend address, you don't need to use the

Re: Userid schemes

2023-07-15 Thread Michael Brennan
A good userid scheme should not identify who the userid belongs to or the job function of the person. Several places I have worked had this philosophy. All userids that belonged to a human began with the letter U followed by 3 to 6 random characters and numbers. On Thu, Jul 13, 2023 at 4:22 PM

Re: Userid schemes

2023-07-15 Thread Tony Thigpen
While I might agree to that somewhat, it fails when you also use the userid for other things, such as email, where the userid is 'public'. But, uses of alias for public view can resolve that issue. For instance, my email userid at 'vse2pdf.com' is not 'tony', it's something else.

Re: What happened to GC26-1672 Batch Local Shared Resource(LSR) Documentation?

2023-07-15 Thread Laurence Chiu
On Fri, Jul 7, 2023 at 5:35 PM allan winston wrote: > I did a lot of work in this area 20 years ago. > [snip] > > CICS is an entirely different ballgame. In the rare event that the VSAM > files in your shop are still using LSR instead of RLS, then there are > opportunities for performance