Re: XLC inline assembler question

2023-05-03 Thread Phil Smith III
Thanks to all for the info! (Summary for the assembler list, since the action was all on IBM-MAIN: It won't hurt; might affect optimization slightly, but probably not worth worrying about.) -- For IBM-MAIN subscribe /

Re: XLC inline assembler question

2023-05-02 Thread Linda Chui
On Mon, 1 May 2023 18:18:38 -0400, Phil Smith III wrote: >Doh, I of course meant -qasm not -dasm. > > > >From: Phil Smith III >Sent: Monday, May 1, 2023 5:02 PM >To: ibm-m...@bama.ua.edu; IBM Mainframe Assembler List >(assembler-l...@listserv.uga.edu) >Su

Re: XLC inline assembler question

2023-05-01 Thread Paul Gilmartin
On Mon, 1 May 2023 17:02:23 -0400, Phil Smith III wrote: >(Cross-posted to IBM-MAIN and the assembler list) > >...; what isn't clear is whether there's any downside to it beyond the >unlikely case that you decide to have a function of your own named asm or >__asm or __asm__. Is there? > I

Re: XLC inline assembler question

2023-05-01 Thread Phil Smith III
Doh, I of course meant -qasm not -dasm. From: Phil Smith III Sent: Monday, May 1, 2023 5:02 PM To: ibm-m...@bama.ua.edu; IBM Mainframe Assembler List (assembler-l...@listserv.uga.edu) Subject: XLC inline assembler question (Cross-posted to IBM-MAIN and the assembler list) When

XLC inline assembler question

2023-05-01 Thread Phil Smith III
(Cross-posted to IBM-MAIN and the assembler list) When compiling C programs with XLC, you need to specify the -dasm flag to have inline assembler code recognized as such. I can see PoE arguments for requiring that option; what isn't clear is whether there's any downside to it beyond the

Re: Assembler question

2020-07-06 Thread Mike Schwab
gt; From: IBM Mainframe Discussion List On > :>> Behalf Of Joe Monk > :>> Sent: Sunday, July 05, 2020 4:38 PM > :>> To: IBM-MAIN@LISTSERV.UA.EDU > :>> Subject: Re: Assembler question > :>> > :>> 01 BLA-RECORD. > :>> 05 BLA-RECORD PIC X(4).

Re: Assembler question

2020-07-06 Thread Binyamin Dissen
t; From: IBM Mainframe Discussion List On :>> Behalf Of Joe Monk :>> Sent: Sunday, July 05, 2020 4:38 PM :>> To: IBM-MAIN@LISTSERV.UA.EDU :>> Subject: Re: Assembler question :>> :>> 01 BLA-RECORD. :>> 05 BLA-RECORD PIC X(4). :>> 05 BLA-R

Re: Assembler question

2020-07-05 Thread Gibney, Dave
Actually, it is. But, BLA-2 below is still offset 3 bytes from BLA-RECORD because BLA-1 is only 3 bytes long > -Original Message- > From: IBM Mainframe Discussion List On > Behalf Of Joe Monk > Sent: Sunday, July 05, 2020 4:38 PM > To: IBM-MAIN@LISTSERV.UA.EDU > Subj

Re: Assembler question

2020-07-05 Thread Joe Monk
01 BLA-RECORD. 05 BLA-RECORD PIC X(4). 05 BLA-RECOR2 REDEFINES BLA-RECORD PIC X(3). The 01 is aligned. The 05 is aligned. The second 05 is not aligned. Joe On Sun, Jul 5, 2020 at 6:27 PM Binyamin Dissen wrote: > 01 BLA-RECORD. >05 BLA-1 PIC X(3). >05

Re: Assembler question

2020-07-05 Thread Binyamin Dissen
01 BLA-RECORD. 05 BLA-1 PIC X(3). 05 BLA-2 PIC S9(8) COMP. Do you truly wish to assert that BLA-2 is aligned? On Sun, 5 Jul 2020 17:45:37 -0500 Joe Monk wrote: :>"Subordinate items are not aligned" :> :>yeah, no. :> :>If an 01 is aligned, then the

Re: Assembler question

2020-07-05 Thread Charles Mills
Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Paul Gilmartin Sent: Sunday, July 5, 2020 1:51 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: Assembler question On Sat, 4 Jul 2020 15:28:44 -0700, Charles Mills wrote: >I am not sure what you are trying to achieve in the big pict

Re: Assembler question

2020-07-05 Thread Peter Relson
>STCK does not show such a restriction. It used to. Those of us with long-ago-enough knowledge remember that well. Regardless, if there is a chance of an operand crossing a cache-line boundary, it might be in your best (performance, not functional) interest to make sure that it doesn't (if

Re: Assembler question

2020-07-05 Thread Joe Monk
"Subordinate items are not aligned" yeah, no. If an 01 is aligned, then the subordinate 05 under the 01 is also aligned. It has to be this way because of REDEFINES. I cant REDEFINE an unaligned item into an aligned item. 77 are aligned because they are standalone, i.e. no grouping. Joe On

Re: Assembler question

2020-07-05 Thread Paul Gilmartin
On Sat, 4 Jul 2020 15:28:44 -0700, Charles Mills wrote: >I am not sure what you are trying to achieve in the big picture but assembler >is not something you can spend a short time on and expect to have something >that works. > >Rexx -- you could study it for 5 minutes and be able to write SAY

Re: Assembler question

2020-07-05 Thread Paul Gilmartin
On Sat, 4 Jul 2020 15:11:54 -0500, Nguyen Dt wrote: >I tried the option NOALIGN when assembling , and it is OK now. > >So it means that i should examine my assembling listing to check if variables >are not separated by some bytes for the alignement ? >When i put all the variable to Character

Re: Assembler question

2020-07-05 Thread Paul Gilmartin
On Sun, 5 Jul 2020 10:23:53 -0500, Nguyen Dt wrote: > >In fact what i tried to do is to Move some fields to my output fields and then >write it as a report. (It is a Db2 performance report, the input are from the >trace buffers with the macros given by Db2 libraries) > >So my program is roughly

Re: Assembler question

2020-07-05 Thread retired mainframer
t; Behalf Of Nguyen Dt > Sent: Sunday, July 05, 2020 8:24 AM > To: IBM-MAIN@LISTSERV.UA.EDU > Subject: Re: Assembler question > > Thank you all for your inputs, > > I am over the problem now. > In fact what i tried to do is to Move some fields to my output fields and > then

Re: Assembler question

2020-07-05 Thread Paul Gilmartin
On Sun, 5 Jul 2020 10:23:53 -0500, Nguyen Dt wrote: > >OW... are the output fields i defined it exactly as in the DSECT got from the >macros. >As it is an output field, the position is important (and it is why i detected >a problem in the positions of my fields) >Its is OK now with OW...

Re: Assembler question

2020-07-05 Thread Rupert Reynolds
OW... are the output fields i defined it exactly as in the DSECT got from the macros. > As it is an output field, the position is important (and it is why i > detected a problem in the positions of my fields) > Its is OK now with OW... variables defined as characters CLx > If it works, it

Re: Assembler question

2020-07-05 Thread Binyamin Dissen
On Sun, 5 Jul 2020 11:31:55 -0500 Joe Monk wrote: :>Cobol has alignment too. You just dont see it. :>All storage is aligned. The opposite is true. Group (01/77) are aligned. Subordinate items are not aligned unless the SYNC clause is specified. :>On Sun, Jul 5, 2020 at 10:24 AM Nguyen Dt

Re: Assembler question

2020-07-05 Thread Joe Monk
Cobol has alignment too. You just dont see it. All storage is aligned. Joe On Sun, Jul 5, 2020 at 10:24 AM Nguyen Dt wrote: > Thank you all for your inputs, > > I am over the problem now. > In fact what i tried to do is to Move some fields to my output fields and > then write it as a report.

Re: Assembler question

2020-07-05 Thread DAL POS Raphael
-- "MVS: Guilty, until proven innocent !!" RDP 2009 -Message d'origine- De : IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] De la part de Nguyen Dt Envoyé : dimanche 5 juillet 2020 17:24 À : IBM-MAIN@LISTSERV.UA.EDU Objet : Re: Assembler question Tha

Re: Assembler question

2020-07-05 Thread Nguyen Dt
Thank you all for your inputs, I am over the problem now. In fact what i tried to do is to Move some fields to my output fields and then write it as a report. (It is a Db2 performance report, the input are from the trace buffers with the macros given by Db2 libraries) So my program is

Re: Assembler question

2020-07-04 Thread Seymour J Metz
dis...@dissensoftware.com] Sent: Saturday, July 4, 2020 8:20 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: Assembler question Incorrect. STCK does not show such a restriction. On Sat, 4 Jul 2020 23:39:44 + Seymour J Metz wrote: :>> (Do CCWs still require doubleword alignment? PSWs? STCK? CDS?)

Re: Assembler question

2020-07-04 Thread Binyamin Dissen
Incorrect. STCK does not show such a restriction. On Sat, 4 Jul 2020 23:39:44 + Seymour J Metz wrote: :>> (Do CCWs still require doubleword alignment? PSWs? STCK? CDS?) :> :>Yes. -- Binyamin Dissen http://www.dissensoftware.com Director, Dissen Software, Bar & Grill - Israel Should

Re: Assembler question

2020-07-04 Thread Seymour J Metz
n.gmu.edu/~smetz3 From: IBM Mainframe Discussion List [IBM-MAIN@LISTSERV.UA.EDU] on behalf of Rupert Reynolds [rreyno...@cix.co.uk] Sent: Saturday, July 4, 2020 5:34 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: Assembler question The question on my mind

Re: Assembler question

2020-07-04 Thread Seymour J Metz
equ...@listserv.ua.edu] Sent: Saturday, July 4, 2020 6:25 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: Assembler question On Sat, 4 Jul 2020 22:34:47 +0100, Rupert Reynolds wrote: >The question on my mind is "What did you want to achieve?" > >If you wanted an aligned fullword for

Re: Assembler question

2020-07-04 Thread Charles Mills
to assemble the output from a disassembler? Charles -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Nguyen Dt Sent: Saturday, July 4, 2020 1:12 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: Assembler question I tried the option NOALIGN wh

Re: Assembler question

2020-07-04 Thread Paul Gilmartin
On Sat, 4 Jul 2020 22:34:47 +0100, Rupert Reynolds wrote: >The question on my mind is "What did you want to achieve?" > >If you wanted an aligned fullword for OW0007AC then you need to decide >whether to align REPORT07 2 bytes after a fullword boundary (precede it >with CNOP 2,4 from memory) or

Re: Assembler question

2020-07-04 Thread Mike Hochee
, 2020 4:12 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: Assembler question Caution! This message was sent from outside your organization. I tried the option NOALIGN when assembling , and it is OK now. So it means that i should examine my assembling listing to check if variables

Re: Assembler question

2020-07-04 Thread David Betten
UA.EDU > Date: 07/04/2020 03:48 PM > Subject: [EXTERNAL] Assembler question > Sent by: IBM Mainframe Discussion List > > Dear lister, > I am learning assembler on my own, i have something strange that i > can't explain , please help me to understand > > Here is a section

Re: Assembler question

2020-07-04 Thread Rupert Reynolds
The question on my mind is "What did you want to achieve?" If you wanted an aligned fullword for OW0007AC then you need to decide whether to align REPORT07 2 bytes after a fullword boundary (precede it with CNOP 2,4 from memory) or whether you want slack bytes in the record. Back in the olde

Re: Assembler question

2020-07-04 Thread Joe Monk
So in REPORT07, you have: 0CL274. This will not reserve any storage, because the multiplier is zero. (7FE). In the next variable, you have XL2. This is hex, length 2. Notice the location counter is at exactly the same place at REPORT07. (7FE). In the next variable you have XL2 again. This is

Re: Assembler question

2020-07-04 Thread Charles Mills
[mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Steve Austin Sent: Saturday, July 4, 2020 12:57 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: Assembler question It is not 4 bytes, it is just that the following field is full word aligned. If the following field were FL4 rather than F, you will see

Re: Assembler question

2020-07-04 Thread Nguyen Dt
I tried the option NOALIGN when assembling , and it is OK now. So it means that i should examine my assembling listing to check if variables are not separated by some bytes for the alignement ? When i put all the variable to Character type i don't have any aligment ... In my case i see the

Re: Assembler question

2020-07-04 Thread Steve Austin
Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Nguyen Dt Sent: Saturday, July 4, 2020 8:48 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Assembler question Dear lister, I am learning assembler on my own, i have something strange that i can't explain , please help me to understand Here

Assembler question

2020-07-04 Thread Nguyen Dt
Dear lister, I am learning assembler on my own, i have something strange that i can't explain , please help me to understand Here is a section of my code : 608 DBLWORD DS DDBLE WORD 609 PATTERN6 DC X'402020202120' 610 * 611 REPORTO7 DS 0CL274 612 OW0007DB DS XL2 613

Re: Another elementary Assembler question

2017-07-04 Thread Charles Mills
U Subject: Re: Another elementary Assembler question On 3 July 2017 at 20:20, John McKown <john.archie.mck...@gmail.com> wrote: > On Mon, Jul 3, 2017 at 6:35 PM, Charles Mills <charl...@mcn.org> wrote: >> It's the elusive COMEFROM instruction. If most languages h

Re: Another elementary Assembler question

2017-07-04 Thread Tony Harminc
On 4 July 2017 at 12:40, Tony Harminc wrote: > Setting up an ESTAE and forcing a program check is probably just a bit to > discover the name you were > invoked by.. "just a bit" -> "just a bit much" Tony H.

Re: Another elementary Assembler question

2017-07-04 Thread Tony Harminc
On 3 July 2017 at 20:20, John McKown wrote: > On Mon, Jul 3, 2017 at 6:35 PM, Charles Mills wrote: >> It's the elusive COMEFROM instruction. If most languages have a GOTO, why >> not a COEMFROM? This is a "where did I come from?" branch table. I

Re: Another elementary Assembler question

2017-07-04 Thread Mike Stayton
Another option is to used the CSVINFO service. It is somewhat complicated to use. https://www.ibm.com/support/knowledgecenter/SSLTBW_2.2.0/com.ibm.zos.v2r2.ieaa700/iea3a7_Description8.htm The data are CSVMODI is described at:

Re: Another elementary Assembler question

2017-07-03 Thread Charles Mills
(a.) or (b.). For (1.) you must use (a.). Charles -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of CM Poncelet Sent: Monday, July 3, 2017 5:47 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: Another elementary Assembler question An alias,

Re: Another elementary Assembler question

2017-07-03 Thread CM Poncelet
An alias, in the PDS directory, points at the exact same 'CCTTR' (if memory serves) as the member that is aliased. So, from an LMOD's LP perspective, there is no distinguishable physical difference between loading an LMOD member or its alias. Just my ha'penny. Chris Poncelet (retired sysprog)

Re: Another elementary Assembler question

2017-07-03 Thread John McKown
On Mon, Jul 3, 2017 at 6:35 PM, Charles Mills wrote: > It's kind of a reverse branch table. > > It's the elusive COMEFROM instruction. If most languages have a GOTO, why > not a COEMFROM? This is a "where did I come from?" branch table. > ​Sounds like an "ask the BEAR"

Re: Another elementary Assembler question

2017-07-03 Thread Charles Mills
On Behalf Of scott Ford Sent: Monday, July 3, 2017 4:06 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: Another elementary Assembler question Charles, Like a program branch table ? Scott On Mon, Jul 3, 2017 at 6:55 PM Charles Mills <charl...@mcn.org> wrote: > I don't see the advanta

Re: Another elementary Assembler question

2017-07-03 Thread scott Ford
> > Charles > > > -Original Message- > From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On > Behalf Of Hardee, Chuck > Sent: Monday, July 3, 2017 3:10 PM > To: IBM-MAIN@LISTSERV.UA.EDU > Subject: *RE: Another elementary Assembler question > > Why n

Re: Another elementary Assembler question

2017-07-03 Thread Charles Mills
, July 3, 2017 3:10 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: *RE: Another elementary Assembler question Why not change your entry code slightly: WHATEVER CSECT ENTRY0 JAS R15,MAIN ENTRY1 JAS R15,MAIN ENTRY2 JAS R15,MAIN ENTRY3 JAS R15,MAIN ENTRY4 JAS R15,MAIN LARL R12

Re: Another elementary Assembler question

2017-07-03 Thread Charles Mills
l MAIN, which should immediately precede the LARL. Charles -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Steve Smith Sent: Monday, July 3, 2017 2:56 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: Another elementary Assembler

*RE: Another elementary Assembler question

2017-07-03 Thread Hardee, Chuck
e: Another elementary Assembler question If invoked with system services (LINK, EXEC, etc.) in AMODE 64, then R15 does not point to anything at all (S0C4-3? if you thought it did). sas On Mon, Jul 3, 2017 at 5:11 PM, Charles Mills <charl...@mcn.org> wrote: > I have a program that has five

Re: Another elementary Assembler question

2017-07-03 Thread Steve Smith
ay, July 3, 2017 1:33 PM > To: IBM-MAIN@LISTSERV.UA.EDU > Subject: Re: Another elementary Assembler question > > An alternative to looking up the cde. > > Entry Alias1 > Alias1 J Main r15 points here for alias1 Entry Alias2 > Alias2 J Main r15 points here for alias2 Entry MAIN

Re: Another elementary Assembler question

2017-07-03 Thread Charles Mills
-MAIN@LISTSERV.UA.EDU Subject: Re: Another elementary Assembler question An alternative to looking up the cde. Entry Alias1 Alias1 J Main r15 points here for alias1 Entry Alias2 Alias2 J Main r15 points here for alias2 Entry MAIN Main DS 0AD r15 points here for main Larl 12,Main (or data area) set

Re: Another elementary Assembler question

2017-07-03 Thread Webster, Chris
... For amode 64, some cleanup of r15 would be needed. ...chris. -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Binyamin Dissen Sent: July-03-17 7:31 AM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: Another elementary Assembler

Re: Another elementary Assembler question

2017-07-03 Thread Binyamin Dissen
Assuming EXEC PGM=, the CDE pointed to by the PRB will have the name.invoked. On Mon, 3 Jul 2017 13:49:33 + "PINION, RICHARD W." wrote: :>If I have an assembler program that has an alias, how can I determine from within that program, what :>name was used to

Re: Another elementary Assembler question

2017-07-03 Thread Dan @ Poodles
-MAIN@LISTSERV.UA.EDU Subject: Another elementary Assembler question If I have an assembler program that has an alias, how can I determine from within that program, what name was used to execute the program. SRC name = A Load module name = A Alias name= B Depending on how the program

Re: Another elementary Assembler question

2017-07-03 Thread Charles Mills
This has been addressed here before. (Of course, it's not really an assembler question -- would be a similar question if you coded in COBOL or C.) Probably the easiest thing is to give your program two distinct entry points and note which one you came through. There is control block chaining

Another elementary Assembler question

2017-07-03 Thread PINION, RICHARD W.
If I have an assembler program that has an alias, how can I determine from within that program, what name was used to execute the program. SRC name = A Load module name = A Alias name= B Depending on how the program was executed A or B, I want the program to take make certain

Re: Assembler question

2017-04-08 Thread Tony Thigpen
Thanks all. I got it working with MACRF=(GL,PL) and using PUTX. Tony Thigpen David W Noon wrote on 04/08/2017 11:20 AM: On Fri, 7 Apr 2017 19:09:09 -0400, Tony Thigpen (t...@vse2pdf.com) wrote about "Assembler question" (in <58e81c15.6060...@vse2pdf.com>): [snip]

Re: Assembler question

2017-04-08 Thread David W Noon
On Fri, 7 Apr 2017 19:09:09 -0400, Tony Thigpen (t...@vse2pdf.com) wrote about "Assembler question" (in <58e81c15.6060...@vse2pdf.com>): [snip] > OPEN (HPPCTL,UPDAT) > HPPCTL DCB DSORG=PS,RECFM=F,LRECL=100,DDNAME=HPPCTL, >BLKSIZE=(100), &

Re: Assembler question

2017-04-08 Thread Peter Hunkeler
> OPEN for UPDAT might require the GET LOCATE instead of GET MOVE. Yes. See the FM "DFSMS Macro Instructions for Data Sets" UPDAT Data set to be updated in place or, for BDAM, blocks are to be updated or added. If you specify UPDAT using QSAM, you must use locate mode. Restriction: The UPDAT

Re: Assembler question

2017-04-07 Thread CM Poncelet
If memory serves, OPEN (HPPCTL,UPDAT) should be coded as OPEN (HPPCTL,'UPDAT') - with quotes around UPDAT (or INPUT or OUTPUT). On 08/04/2017 00:28, Sam Siegel wrote: > OPEN for UPDAT might require the GET LOCATE instead of GET MOVE. > > Try OPEN for INPUT and see if work area is populated. >

Re: Assembler question

2017-04-07 Thread Sam Siegel
OPEN for UPDAT might require the GET LOCATE instead of GET MOVE. Try OPEN for INPUT and see if work area is populated. On Fri, Apr 7, 2017 at 4:09 PM, Tony Thigpen wrote: > I am helping on an assembler program that is accessing a sequential file in > move mode, yet the move is

Assembler question

2017-04-07 Thread Tony Thigpen
I am helping on an assembler program that is accessing a sequential file in move mode, yet the move is not happening. R1 points to valid data after the GET, but the record area specified was not filled in. This application is being ported from VSE to z/OS. Code snippets: OPEN

Re: Simple assembler question

2016-06-24 Thread Phil Smith III
Thanks to all who replied; the use case is returning a 64-bit value to a C function, which LE does by putting the top half in R0 and the bottom half in R15. Which is weird but is how it’s done. So I don’t much care about the top halves, nor bit 0 of the 32-bit register, but thanks for the

Re: Simple assembler question

2016-06-24 Thread Tony Harminc
On 24 June 2016 at 18:50, Charles Mills wrote: > Umm, Tony, did you read Programming Note 1.? Only after I'd figured it out myself. Of course there's still a tendency to think that it somehow costs more to rotate the bits all the way around, and it'd be faster/cheaper to

Re: Simple assembler question

2016-06-24 Thread Steve Beaver
-MAIN@LISTSERV.UA.EDU Subject: Re: Simple assembler question For the SLLG, SRLG, SRAG and others, if you load the B register with the number of bits to shift and set the D value to zero, you can shift a variable number of bits without using an EXECUTE instruction. And there are SRL, SRDL, SRAG

Re: Simple assembler question

2016-06-24 Thread Frank Swarbrick
You ninja'd me! > Date: Fri, 24 Jun 2016 15:50:53 -0700 > From: charl...@mcn.org > Subject: Re: Simple assembler question > To: IBM-MAIN@LISTSERV.UA.EDU > > Umm, Tony, did you read Programming Note 1.? > > Charles > > -Original Message- > Fr

Re: Simple assembler question

2016-06-24 Thread Charles Mills
Umm, Tony, did you read Programming Note 1.? Charles -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Tony Harminc Sent: Friday, June 24, 2016 2:54 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: Simple assembler question On 24 June

Re: Simple assembler question

2016-06-24 Thread Frank Swarbrick
-right amount. > Date: Fri, 24 Jun 2016 17:54:26 -0400 > From: t...@harminc.net > Subject: Re: Simple assembler question > To: IBM-MAIN@LISTSERV.UA.EDU > > On 24 June 2016 at 16:23, Blaicher, Christopher Y. > <cblaic...@syncsort.com> wrote: > > And there are SRL, SRDL

Re: Simple assembler question

2016-06-24 Thread Tony Harminc
On 24 June 2016 at 16:23, Blaicher, Christopher Y. wrote: > And there are SRL, SRDL, SRAG and SRLG that rotate right. Well, no, they *shift* right. There is no need for any instruction to rotate right. As I said, I spent an embarassing amount of time pondering why IBM

Re: Simple assembler question

2016-06-24 Thread Frank Swarbrick
I'm still waiting for the DWIMNWIS instruction. > Date: Fri, 24 Jun 2016 15:15:08 -0400 > From: t...@harminc.net > Subject: Re: Simple assembler question > To: IBM-MAIN@LISTSERV.UA.EDU > > On 23 June 2016 at 17:51, Phil Smith III <li...@akphs.com> wrote: > > >

Re: Simple assembler question

2016-06-24 Thread Charles Mills
@LISTSERV.UA.EDU Subject: Re: Simple assembler question For the SLLG, SRLG, SRAG and others, if you load the B register with the number of bits to shift and set the D value to zero, you can shift a variable number of bits without using an EXECUTE instruction. And there are SRL, SRDL, SRAG and SRLG

Re: Simple assembler question

2016-06-24 Thread Blaicher, Christopher Y.
Sent: Friday, June 24, 2016 3:59 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: Simple assembler question > there are no versions of these instruction that rotate right... Blatant liberal* slant? Interesting. I was just looking at these instructions, which I have never used. The rotate co

Re: Simple assembler question

2016-06-24 Thread Charles Mills
ean and Asian members. Charles -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Tony Harminc Sent: Friday, June 24, 2016 12:15 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: Simple assembler question On 23 June 2016 at 17:51, Phil Smith III

Re: Simple assembler question

2016-06-24 Thread Tony Harminc
On 23 June 2016 at 17:51, Phil Smith III wrote: > > With all of the 273 new formats of LOAD, I assume this is hiding in there > somewhere: > I have a value in grande register 3. I need the high-order bits in 32-bit R0 > and the low-order bits in 32-bit R15. The RxSB...

Re: Simple assembler question

2016-06-24 Thread Wayne Driscoll
IN@LISTSERV.UA.EDU > Date: 06/23/2016 09:47 PM > Subject: Re: [IBM-MAIN] Simple assembler question > Sent by: IBM Mainframe Discussion List <IBM-MAIN@LISTSERV.UA.EDU> > > Chuck wrote: > > >I would consider something like this: > > >LR R15,R3

Re: Simple assembler question

2016-06-24 Thread Peter Relson
>>LR R15,R3 Copy low 32-bits to R15 >>SRLGR0,R3,32Copy upper 32-bits to R0 >You may want to add an SR or XR for register 0 and 15 prior to the >above two instructions if you want to make sure of the upper >32-bits of the target registers. FWIW,

Re: Simple assembler question

2016-06-24 Thread Tom Marchant
On Fri, 24 Jun 2016 00:23:18 -0500, Andre Schoeman wrote: >SLLGR0,R3,32 /* Shift bits 0-31 in R3 to bits 32-63 in R0 */ I think you mean SRLG. -- Tom Marchant -- For IBM-MAIN subscribe / signoff / archive access

Re: Simple assembler question

2016-06-24 Thread Tom Marchant
On Thu, 23 Jun 2016 22:27:37 +, Hardee, Chuck wrote: > LR R15,R3 Copy low 32-bits to R15 > SRLGR0,R3,32Copy upper 32-bits to R0 > >You may want to add an SR or XR for register 0 and 15 prior to the above two >instructions if you want to make sure

Re: Simple assembler question

2016-06-24 Thread Don Poitras
In article <9788957341066676.wa.adtschoemanyahoo...@listserv.ua.edu> you wrote: > You forgot to specify whether the top 32 bits of R0 and R15 must be zero > after the lower 32 bits have been manipulated. > Assuming that you do, then: > LLGFR 15,3 /* Load bits 32-63 in R3 into bits 32-63

Re: Simple assembler question

2016-06-23 Thread Andre Schoeman <adtschoe...@yahoo.ca>
You forgot to specify whether the top 32 bits of R0 and R15 must be zero after the lower 32 bits have been manipulated. Assuming that you do, then: LLGFR 15,3 /* Load bits 32-63 in R3 into bits 32-63 of R15 and clear bits 0-31 of R15 */ XGR 0,0 /* Initialize 64-bit R0 to

Re: Simple assembler question

2016-06-23 Thread David Cole
Newbies! ;-) At 6/23/2016 10:47 PM, Phil Smith III wrote: Chuck wrote: >I would consider something like this: >LR R15,R3 Copy low 32-bits to R15 >SRLGR0,R3,32Copy upper 32-bits to R0 >You may want to add an SR or XR for register 0 and 15

Re: Simple assembler question

2016-06-23 Thread Dave Cole
Newbies! ;-) At 6/23/2016 10:47 PM, Phil Smith III wrote: Chuck wrote: >I would consider something like this: >LR R15,R3 Copy low 32-bits to R15 >SRLGR0,R3,32Copy upper 32-bits to R0 >You may want to add an SR or XR for register 0 and 15

Re: Simple assembler question

2016-06-23 Thread Phil Smith III
Chuck wrote: >I would consider something like this: >LR R15,R3 Copy low 32-bits to R15 >SRLGR0,R3,32Copy upper 32-bits to R0 >You may want to add an SR or XR for register 0 and 15 prior to the above two instructions if you want to make sure of

Re: Simple assembler question

2016-06-23 Thread Hardee, Chuck
Subject: Simple assembler question With all of the 273 new formats of LOAD, I assume this is hiding in there somewhere: I have a value in grande register 3. I need the high-order bits in 32-bit R0 and the low-order bits in 32-bit R15. What's the simplest/fastest way to achieve this? I have

Simple assembler question

2016-06-23 Thread Phil Smith III
With all of the 273 new formats of LOAD, I assume this is hiding in there somewhere: I have a value in grande register 3. I need the high-order bits in 32-bit R0 and the low-order bits in 32-bit R15. What's the simplest/fastest way to achieve this? I have no writable memory available.

Re: C and Assembler question

2013-04-10 Thread Shmuel Metz (Seymour J.)
In 14a501ce346e$16790580$436b1080$@mcn.org, on 04/08/2013 at 08:31 AM, Charles Mills charl...@mcn.org said: No. Re-read MY code, not the OP's. Okay. Yes, that does pass back the rc. -- Shmuel (Seymour J.) Metz, SysProg and JOAT Atid/2http://patriot.net/~shmuel We don't

Re: C and Assembler question

2013-04-08 Thread Shmuel Metz (Seymour J.)
In 135301ce33bf$5736eab0$05a4c010$@mcn.org, on 04/07/2013 at 11:40 AM, Charles Mills charl...@mcn.org said: No. Re-read my code. No need; you save the STORAGE rc into a parameter, but that is not the value in R15 when your code encounters EDCEPIL. STR15,0(R11) RETURN

Re: C and Assembler question

2013-04-08 Thread Charles Mills
*- LRR15,R5 RC for caller EDCEPIL Charles -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Shmuel Metz (Seymour J.) Sent: Monday, April 08, 2013 7:30 AM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: C and Assembler question

Re: C and Assembler question

2013-04-07 Thread Shmuel Metz (Seymour J.)
In 123a01ce3301$c5d50920$517f1b60$@mcn.org, on 04/06/2013 at 01:03 PM, Charles Mills charl...@mcn.org said: Are you sure? Which rc is going to survive after rc = GETSP231(fullwd2,fullwd1,rc); The one on the left of the equal sign! (Which is the value in R15 when you execute EDCEPIL.) That

Re: C and Assembler question

2013-04-07 Thread Charles Mills
No. Re-read my code. Charles -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Shmuel Metz (Seymour J.) Sent: Saturday, April 06, 2013 8:29 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: C and Assembler question In 123a01ce3301$c5d50920

C and Assembler question

2013-04-06 Thread Scott Ford
Guys: I have an Assembler routine below i want to call in C. I have changed it to be LE conforming. GETSP231 START 0 GETSP231 AMODE 31 GETSP231 RMODE ANY EDCPRLG BASEREG=R12,DSALEN=WORKLEN USING LGINWORK,R13 SAVEAREA AND LOCAL VARS

Re: C and Assembler question

2013-04-06 Thread Gerhard Postpischil
On 4/6/2013 2:01 PM, Scott Ford wrote: STR1,0(R5) RETURN ADDR, IF ANY I get a RC=0 which is great, but i should get the address passed back to C and I dont see it .. As previously noted, you should store into R10, and preferably save the register values and do the stores after

Re: C and Assembler question

2013-04-06 Thread Bob Rutledge
Scott Ford wrote: Guys: I have an Assembler routine below i want to call in C. I have changed it to be LE conforming. GETSP231 START 0 GETSP231 AMODE 31 GETSP231 RMODE ANY EDCPRLG BASEREG=R12,DSALEN=WORKLEN USING LGINWORK,R13 SAVEAREA AND LOCAL VARS

Re: C and Assembler question

2013-04-06 Thread Charles Mills
@LISTSERV.UA.EDU Subject: Re: C and Assembler question Scott Ford wrote: Guys: I have an Assembler routine below i want to call in C. I have changed it to be LE conforming. ... great Are you sure? Which rc is going to survive after rc = GETSP231(fullwd2,fullwd1,rc); Bob