Re: [Intel-gfx] [PATCH-v2 0/3] drm/i915: interlaced mode support

2012-01-21 Thread Peter Ross
On Fri, Jan 20, 2012 at 10:24:03PM +1100, Peter Ross wrote: > On Wed, Jan 18, 2012 at 12:55:15PM -0800, Jesse Barnes wrote: > > On Wed, 18 Jan 2012 18:39:40 -0200 > > Paulo Zanoni wrote: > > > > > Hi > > > > > > 2012/1/18 Peter Ross : > > > > This patch set enables enables interlaced mode output

Re: [Intel-gfx] [PATCH] drm/i915: fixup assert_pipe to take the pipe A quirk into account

2012-01-21 Thread Keith Packard
On Sun, 22 Jan 2012 01:36:48 +0100, Daniel Vetter wrote: > This was completely spamming dmesg on my i855gm. This comes from intel_disable_pll, which wants to turn the pll off, but if the pipe is still active, it won't be able to. This seems bad to me. -- keith.pack...@intel.com pgpcpe8pKoTIq

Re: [Intel-gfx] Sandy Bridge Desktop - 1920x1080i interlace not working

2012-01-21 Thread Alfonso Fiore
On Sat, Jan 21, 2012 at 10:09 PM, Daniel Vetter wrote: > > Ok, from the above it looks like the VGA input on your TV is dirt-cheap > and it barely manages to sync at 800x600 and fails already at 1024x768 - > not even the bios manages to put a picture on your TV :( > > To make sure that this is not

[Intel-gfx] [PATCH] drm/i915: fixup assert_pipe to take the pipe A quirk into account

2012-01-21 Thread Daniel Vetter
This was completely spamming dmesg on my i855gm. Signed-Off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 5ba19df..1709e67 1

Re: [Intel-gfx] [PATCH 2/2] intel_audio_dump: show more AUD_CONFIG bits

2012-01-21 Thread Daniel Vetter
On Sat, Jan 21, 2012 at 08:06:38PM -0200, Eugeni Dodonov wrote: > On Mon, Jan 16, 2012 at 21:19, Wu Fengguang wrote: > > > > > Signed-off-by: Wu Fengguang > > --- > > tools/intel_audio_dump.c | 35 +++ > > 1 file changed, 35 insertions(+) > > > > Everything lo

Re: [Intel-gfx] [PATCH 2/2] intel_audio_dump: show more AUD_CONFIG bits

2012-01-21 Thread Eugeni Dodonov
On Mon, Jan 16, 2012 at 21:19, Wu Fengguang wrote: > > Signed-off-by: Wu Fengguang > --- > tools/intel_audio_dump.c | 35 +++ > 1 file changed, 35 insertions(+) > Everything looks fine to me, so: Reviewed-by: Eugeni Dodonov -- Eugeni Dodonov

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Remove the MI_FLUSH_ENABLE setting.

2012-01-21 Thread Ben Widawsky
On 01/19/2012 10:50 AM, Eric Anholt wrote: > We have always been using the wrong bit -- it's bit 12. However, the > bit also doesn't do anything -- hardware has always accepted the > MI_FLUSH command even when it was specced not to. > > Given that there is only one MI_FLUSH emitted in all of the

Re: [Intel-gfx] Sandy Bridge Desktop - 1920x1080i interlace not working

2012-01-21 Thread Daniel Vetter
On Sat, Jan 21, 2012 at 10:09:16PM +0100, Daniel Vetter wrote: > On Fri, Jan 20, 2012 at 12:37:25AM +0100, Alfonso Fiore wrote: > > On Thu, Jan 19, 2012 at 9:50 PM, Daniel Vetter wrote: > > > > > > Ok, please make this _really_ precise, we need to know exactly when things > > > work and when not.

Re: [Intel-gfx] Sandy Bridge Desktop - 1920x1080i interlace not working

2012-01-21 Thread Daniel Vetter
On Fri, Jan 20, 2012 at 12:37:25AM +0100, Alfonso Fiore wrote: > On Thu, Jan 19, 2012 at 9:50 PM, Daniel Vetter wrote: > > > > Ok, please make this _really_ precise, we need to know exactly when things > > work and when not. I presume this was showing a perfect screen over the > > HDMI cable? > >

Re: [Intel-gfx] Updated -next

2012-01-21 Thread Alan W. Irwin
On 2012-01-21 15:12+0100 Daniel Vetter wrote: drm-intel-testing is drm-intel-next and drm-intel-fixes merged together (as the time of when I've pushed things out). Gordon Jin said that he prefers to qa one single branch and that qa will take the job of finding out whether an issue has been intro

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Correct the bit number for the MI_FLUSH_ENABLE.

2012-01-21 Thread Daniel Vetter
On Thu, Jan 19, 2012 at 10:50:06AM -0800, Eric Anholt wrote: > Older specs claimed this was bit 11, but newer specs and the actual > simulator code say it was bit 12. Regardless, we don't use MI_FLUSH, > or try to enable it any more. > > Signed-off-by: Eric Anholt I'd like to amend this with th

Re: [Intel-gfx] [PATCH 1/1] drm/i915: print out which pixel format we do not support

2012-01-21 Thread Daniel Vetter
On Tue, Jan 17, 2012 at 03:25:45PM -0200, Eugeni Dodonov wrote: > Otherwise, we are left with pretty bogus message saying that the pixel > format is not supported while leaving the details to the telepatic powers. > > v2: use DRM_DEBUG_KMS instead of DRM_ERROR > > Signed-off-by: Eugeni Dodonov Q

Re: [Intel-gfx] [PATCH] drm/i915: properly mask and or watermark values for sprites

2012-01-21 Thread Daniel Vetter
On Thu, Jan 19, 2012 at 04:48:52PM -0800, Keith Packard wrote: > On Mon, 16 Jan 2012 11:57:54 -0800, Jesse Barnes > wrote: > > > Now that we're using the sprite WM fields, we need to take care not to > > clobber them in the main update_wm functions. While we're at it, make > > sure we mask out

Re: [Intel-gfx] [PATCH] drm/i915: clarify gen2 pageflip cmd

2012-01-21 Thread Daniel Vetter
On Fri, Jan 20, 2012 at 11:47:59AM -0800, Eric Anholt wrote: > On Fri, 20 Jan 2012 10:43:44 +0100, Daniel Vetter > wrote: > > I've reviewed gen2 pageflip code do hunt down multple prepare pageflip > > issues. The only thing I've found is a slight but functionally > > meaningless confusion about t

Re: [Intel-gfx] Updated -next

2012-01-21 Thread Daniel Vetter
On Sat, Jan 21, 2012 at 04:15:40AM +, Sun, Yi wrote: > > Hi all, > > > > Not much in the first -next update under the new process, I'd like to > > tests the qa process first. Highligths: > > - first part of i9xx_crtc_mode_set refactor from Jesse > > - quite a few ajax-is-paranoid patches > > -

Re: [Intel-gfx] Second Life / HD Graphics 3000 / Linux / OpenGL

2012-01-21 Thread AW
i just hacked the file /usr/lib/dri/i965_dri.so so that it claims to be "Intel HD3000"... but secondlife crashed after opening a window, although "Intel Graphics HD 3000" is supported by SL. isnt there an open source reference implementation of OpenGL? then Mesa could do it on the CPU until Intel

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Remove the MI_FLUSH_ENABLE setting.

2012-01-21 Thread Kenneth Graunke
On 01/19/2012 10:50 AM, Eric Anholt wrote: We have always been using the wrong bit -- it's bit 12. However, the bit also doesn't do anything -- hardware has always accepted the MI_FLUSH command even when it was specced not to. Given that there is only one MI_FLUSH emitted in all of the driver s