On Fri, 05 Apr 2013, Ben Widawsky b...@bwidawsk.net wrote:
Only the very first switch doesn't take the path.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gem_context.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On Thu, Apr 04, 2013 at 04:41:53PM -0700, Ben Widawsky wrote:
Storing the last context requires refcounting. Mika recently submitted
some refcounting patches which leverages our request mechanism. This is
insufficient for my needs because we want to know the last context even
if the request
On Thu, Apr 04, 2013 at 04:41:48PM -0700, Ben Widawsky wrote:
This allows us to make upcoming refcounting code a bit simpler, and
cleaner. In addition, I think it makes the interface a bit nicer if the
caller doesn't need to figure out default contexts and such.
The interface works very
On Fri, Apr 05, 2013 at 01:51:24AM +0200, Laurent Pinchart wrote:
Hi Ville,
On Thursday 04 April 2013 22:52:37 Ville Syrjälä wrote:
On Thu, Apr 04, 2013 at 06:38:15PM +0200, Laurent Pinchart wrote:
On Wednesday 27 March 2013 17:46:22 ville.syrj...@linux.intel.com wrote:
From: Ville
From: Ville Syrjälä ville.syrj...@linux.intel.com
struct drm_rect represents a simple rectangle. The utility
functions are there to help driver writers.
v2: Moved the region stuff into its own file, made the smaller funcs
static inline, used 64bit maths in the scaled clipping function to
Hi
I found that x11 works much slower after my recent gentoo update.
I can see that it draws screen much slower than before system update.
I can see it when switching from one window workspace to another. After
update the
screen is redrawn much longer. I also can see it when playing movies with
On Fri, Apr 05, 2013 at 05:07:07PM +0200, j j wrote:
I performed an update very carefully. I did all the steps suggested by gentoo
packages and quot;eselect newsquot;. I rebuild xf86-video-intel and most
probably
turned on what is required in the kernel. My video hardware is intel (815 E)
on
On Thu, 4 Apr 2013 21:31:03 +0100
Chris Wilson ch...@chris-wilson.co.uk wrote:
In order to fully serialize access to the fenced region and the update
to the fence register we need to take extreme measures on SNB+, and
manually flush writes to memory prior to writing the fence register in
On Fri, Apr 05, 2013 at 10:09:58AM +0300, Jani Nikula wrote:
On Fri, 05 Apr 2013, Ben Widawsky b...@bwidawsk.net wrote:
Only the very first switch doesn't take the path.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gem_context.c | 2 +-
1 file changed,
On Fri, Apr 05, 2013 at 01:41:11PM +0300, Ville Syrjälä wrote:
On Thu, Apr 04, 2013 at 04:41:48PM -0700, Ben Widawsky wrote:
This allows us to make upcoming refcounting code a bit simpler, and
cleaner. In addition, I think it makes the interface a bit nicer if the
caller doesn't need to
On Fri, Apr 05, 2013 at 08:51:57AM +0100, Chris Wilson wrote:
On Thu, Apr 04, 2013 at 04:41:53PM -0700, Ben Widawsky wrote:
Storing the last context requires refcounting. Mika recently submitted
some refcounting patches which leverages our request mechanism. This is
insufficient for my
On Tue, Apr 02, 2013 at 11:26:06PM +0200, Daniel Vetter wrote:
On Tue, Apr 2, 2013 at 11:20 PM, Jesse Barnes jbar...@virtuousgeek.orgwrote:
On Thu, 28 Mar 2013 10:42:03 +0100
Daniel Vetter daniel.vet...@ffwll.ch wrote:
With the exception of hsw, which has dedicated DP clocks which run
Hi
2013/4/4 Daniel Vetter daniel.vet...@ffwll.ch:
commit de13a2e3f88a4da8e85063b6de37096795079e41
Author: Paulo Zanoni paulo.r.zan...@intel.com
Date: Thu Sep 20 18:36:05 2012 -0300
drm/i915: extract compute_dpll from ironlake_crtc_mode_set
missed the subtle adjustment of the FP1
From: Ben Widawsky b...@bwidawsk.net
Uses slightly different interfaces than other platforms.
v2: track actual set freq, not requested (Rohit)
fix debug prints in init code (Jesse)
v3: don't write sleep reg (Jesse)
re-add RC6 wake limit write (Ben)
fixup thresholds to match other
Interrupts, clock gating, LVDS, and GMBUS are all within the, this will
be bad for CPU range when we have PCH_NOP.
There is a bit of a hack in init clock gating. We want to do most of the
clock gating, but the part we skip will hang the system. It could
probably be abstracted a bit better, but I
More registers we can't write.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_suspend.c | 58 +++--
1 file changed, 42 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_suspend.c
GEN supports a fusing option which subtracts the PCH display (making the
CPU display also useless). In this configuration MMIO which gets decoded
to a certain range will hang the CPU.
For us, this is sort of the equivalent of having no pipes, and we can
easily modify some code to not do certain
BIOS should be setting this, but in case it doesn't...
v2: Define the bits we actually want to clear (Jesse)
Make it an RMW op (Jesse)
Signed-off-by: Ben Widawsky b...@bwidawsk.net
Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org
---
drivers/gpu/drm/i915/i915_gem.c | 6 ++
FIXME: This is based on some HW being used for a demo. We should
probably wait until we have confirmation on the IDs before upstreaming
this patch.
v2: Use GEN7_FEATURES (Chris)
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_drv.c | 17 +
1 file
Set up PCH_NOP when we match a certain platform.
v2: Just do a num_pipes check + comment instead of trying to check the
platform (Daniel)
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_drv.c | 9 +
1 file changed, 9 insertions(+)
diff --git
Given certain fusing options discussed in the previous patch, it's
possible to end up with platforms that normally have PCH but that PCH
doesn't actually exist. In many cases, this is easily remedied with
setting 0 pipes. This covers the other corners.
Requiring this is a symptom of improper code
Hi
2013/4/4 Daniel Vetter daniel.vet...@ffwll.ch:
Only on IBX should we set the limiting factor to 25 unconditionally
for dual-channel mode, on CPT/PPT 25 only applies when the lvds
refclock is 100MHz.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
Reviewed-by: Paulo Zanoni
On Thu, Apr 4, 2013 at 11:53 PM, George Amanakis g_amana...@yahoo.com wrote:
Compiled und run the kernel as you instructed.
Although the GPU did hang momentarily the dmesg showed no abnormalities.
Can you please explain in more detail what you mean by did hang
momentarily? If it's a real gpu
Hi
2013/4/4 Daniel Vetter daniel.vet...@ffwll.ch:
Since the ratio is different, we also need to pass in the parameters
for the reduced clock. Might or might not reduce flicker for the
auto-downclocking on lvds/eDP.
After this patch, my suggestion to add ironlake_calculate_fp() gets
even
Most importantly this will allow users to set overclock frequencies in
sysfs. Previously the max was limited by the RP0 max as opposed to the
overclock max. This is useful if one wants to either limit the max
overclock frequency, or set the minimum frequency to be in the overclock
range. It also
Requested-by: Daniel Vetter daniel.vet...@ffwll.ch
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/intel_pm.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 2edb743..c81921b
On Fri, Apr 05, 2013 at 09:44:54AM -0700, Ben Widawsky wrote:
On Fri, Apr 05, 2013 at 10:09:58AM +0300, Jani Nikula wrote:
On Fri, 05 Apr 2013, Ben Widawsky b...@bwidawsk.net wrote:
Only the very first switch doesn't take the path.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
I mean that I can type, move the mouse pointer, open new windows but there is a
lag until these changes are displayed. Stuttering like.
I ended up not reverting the aforementioned commit but modifying it. This also
solves the issue. Here is the patch:
diff -rupN
Hi Ville,
Thanks for the patch.
On Friday 05 April 2013 16:19:36 ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
struct drm_rect represents a simple rectangle. The utility
functions are there to help driver writers.
v2: Moved the region stuff into
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