On Mon, May 13, 2013 at 05:56:30PM -0300, Rodrigo Vivi wrote:
As Chris mentioned there is a tendency we finding out more
PCI IDs only when users report. So Let's add all new reserved Haswell IDs.
I didn't have better names for this reserved ids and didn't want to use rsvd1
and rsvd2 groups, so
On Mon, May 13, 2013 at 04:10:18PM +0300, Mika Kuoppala wrote:
Chris Wilson ch...@chris-wilson.co.uk writes:
+
+ intel_ring_init_seqno(ring, seqno);
+ for (i = 0; i ARRAY_SIZE(ring-sync_seqno); i++)
+ ring-sync_seqno[i] = 0;
}
I remember pondering about resetting
Hi all,
This is V2 and some fixes after first round review:
- use reference count to track power-well usage
- remove external module, compiled into snd-hda-intel instead
- manage symbols and module loading properly
- remove IS_HSW macro, use flag instead
- remove audio callback
Haswell Display audio depends on power well in graphic side, it should
request power well before use it and release power well after use.
I915 will not shutdown power well if it detects audio is using.
This patch protects display audio crash for Intel Haswell mobile
C3 stepping board.
At Tue, 14 May 2013 19:44:19 +0800,
Wang Xingchao wrote:
For Intel Haswell chip, HDA controller and codec have
power well dependency from GPU side. This patch added support
to request/release power well in audio driver. Power save
feature should be enabled to get runtime power saving.
At Tue, 14 May 2013 19:44:18 +0800,
Wang Xingchao wrote:
Haswell Display audio depends on power well in graphic side, it should
request power well before use it and release power well after use.
I915 will not shutdown power well if it detects audio is using.
This patch protects display audio
Chris Wilson ch...@chris-wilson.co.uk writes:
On Mon, May 13, 2013 at 04:10:18PM +0300, Mika Kuoppala wrote:
Chris Wilson ch...@chris-wilson.co.uk writes:
+
+ intel_ring_init_seqno(ring, seqno);
+ for (i = 0; i ARRAY_SIZE(ring-sync_seqno); i++)
+ ring-sync_seqno[i] = 0;
}
2013/5/13 Rodrigo Vivi rodrigo.v...@gmail.com:
At DDX commit Chris mentioned the tendency we have of finding out more
PCI IDs only when users report. So Let's add all new reserved Haswell IDs.
This patch also fix GT3 names. I'no not sending in separated patche because
names are only in few
Use msecs_to_jiffies_timeout instead of open-coding the same.
Signed-off-by: Imre Deak imre.d...@intel.com
---
drivers/gpu/drm/i915/intel_drv.h |2 +-
drivers/gpu/drm/i915/intel_i2c.c |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_drv.h
Feel free to use: Reviewed-by: Rodrigo Vivi rodrigo.v...@gmail.com
On Mon, May 13, 2013 at 4:00 PM, Paulo Zanoni przan...@gmail.com wrote:
From: Paulo Zanoni paulo.r.zan...@intel.com
It just prints whether it's supported/enabled/disabled. Feature
requested by the power management team.
Date 13.5.2013 10:28, David Henningsson wrote:
On 05/13/2013 09:37 AM, Wang Xingchao wrote:
I915 module maybe loaded after snd_hda_intel, the power-well
API doesnot exist in such case. This patch intended to avoid
loading dependency between snd-hda-intel and i915 module.
Hi Xingchao and
Date 13.5.2013 10:59, Takashi Iwai wrote:
At Mon, 13 May 2013 10:55:46 +0200,
Jaroslav Kysela wrote:
Date 13.5.2013 10:28, David Henningsson wrote:
On 05/13/2013 09:37 AM, Wang Xingchao wrote:
I915 module maybe loaded after snd_hda_intel, the power-well
API doesnot exist in such case. This
It grew a little... but there's only one real hack left, and that's the
PFIT bits. To fix that properly, I think either we need to pull the
compute_config calls out of set_mode and into its callers so we can
compare pfit state, or something more ambitious where we collect all the
new configs up
We can use this for fetching encoder specific pipe_config state, like
mode flags, adjusted clock, etc.
Just used for mode flags atm, so we can check the pipe config state at
mode set time.
v2: get_config when checking hw state too
v3: fix DVO and LVDS mode flags (Ville)
get SDVO DTD for flag
We already fetch and track other state into the main CRTC and encoder
structs, and for fastboot we need to do the same with the mode and clock
data we read out.
v2: fix debug print
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
drivers/gpu/drm/i915/intel_display.c | 30
We need this for comparing modes between configuration changes.
v2: try harder to calulate non-simple pixel clocks (Daniel)
call get_clock after getting the encoder config, needed for pixel multiply
(Jesse)
v3: drop get_clock now that the pixel_multiply has been moved into
We need to properly track PCH PLL sharing configs, and generally set up
PCH PLL state at init time as part of the state readout process.
v2: update to new code, use intel_crtc instead (Jesse)
v3: move pll_get call to setup_hw_state (Daniel)
I-told-you-so-by: Daniel Vetter daniel.vet...@ffwll.ch
If the crtc is active, we can simply flip a new fb onto it, provided the
other mode setting reqs are met. Otherwise, we'll need to do a full
mode set to re-enable the crtc.
v2: check for crtc active and set mode_changed accordingly
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
Need better pfit tracking to do this right.
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
drivers/gpu/drm/i915/intel_display.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index
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