On Wed, Mar 19, 2014 at 06:31:11PM -0700, Ben Widawsky wrote:
The names of the struct members for RPS are stupid. Every time I need to
do anything in this code I have to spend a significant amount of time to
remember what it all means. By renaming the variables (and adding the
comments) I hope
On Wed, Mar 19, 2014 at 06:31:08PM -0700, Ben Widawsky wrote:
The existing code (which I changed last) was very convoluted. I believe
it was attempting to skip the overclock portion if the previous pcode
write failed. When I last touched the code, I was preserving this
behavior. There is some
On Wed, Mar 19, 2014 at 06:31:14PM -0700, Ben Widawsky wrote:
Programming it outside of the rp0-rp1 range is considered a programming
error. Since we do not know that the previous value would actually be in
the range, program something we've read from the hardware, and therefore
know will
On Wed, Mar 19, 2014 at 06:31:15PM -0700, Ben Widawsky wrote:
We have a need for duplicated parsing of the RP_STATE_CAPS register (and
the setting of the associated fields). To reuse some code, we can
extract the function into a simple helper.
This patch also addresses the fact that we
On Wed, Mar 19, 2014 at 06:31:10PM -0700, Ben Widawsky wrote:
this leaves a temporarily awkward min_delay (the soft limit) with the
new min_freq (the hardware limit). It's fixed in the next patch.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
Reviewed-by: Chris Wilson ch...@chris-wilson.co.uk
On Wed, Mar 19, 2014 at 06:31:12PM -0700, Ben Widawsky wrote:
The values created at initialization must always exist to use the
interface. Reading them again is confusing, and pointless.
More cleanups are coming in the next patch. Since I am not 100% certain,
moreover on BYT, (though I am
On Wed, Mar 19, 2014 at 06:31:13PM -0700, Ben Widawsky wrote:
With the renamed RPS struct members, it's easier to skip the local
variables which no longer clarify anything, and if anything just make
the code harder to read.
The real motivation for this patch is actually the next patch, which
On Wed, Mar 19, 2014 at 06:31:09PM -0700, Ben Widawsky wrote:
Introduced:
commit b8a5ff8d7c676a04e0da5ec16bb068dd39459042
Author: Jeff McGee jeff.mc...@intel.com
Date: Tue Feb 4 11:37:01 2014 -0600
drm/i915: Update rps interrupt limits
Cc: Jeff McGee jeff.mc...@intel.com
On Wed, Mar 19, 2014 at 06:31:18PM -0700, Ben Widawsky wrote:
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index ee32759..4de8800 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2436,6 +2436,7 @@ void
On Wed, 19 Mar 2014, David Woodhouse dw...@infradead.org wrote:
On Tue, 2014-03-18 at 14:59 +0200, Jani Nikula wrote:
From: Chris Wilson ch...@chris-wilson.co.uk
We have reports of heavy screen corruption if we try to use the stolen
memory reserved by the BIOS whilst the DMA-Remapper is
On Wed, Mar 19, 2014 at 09:42:49PM -0700, Ben Widawsky wrote:
On Wed, Mar 19, 2014 at 01:45:46PM +, Chris Wilson wrote:
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
Any clue how you intend to use this for a commit message (I'm actually
curious)? Also, the subject is wrong,
On Thu, 2014-03-20 at 09:36 +0200, Jani Nikula wrote:
Or an additional knob, in case it's really not working and people want
to get other things depending on prelim hw support done.
Yeah. Perhaps the best answer is a 'disable_silicon_workarounds' option,
to disable *all* workarounds for
On Wed, Mar 19, 2014 at 04:06:38PM -0700, Ben Widawsky wrote:
On Wed, Mar 19, 2014 at 09:54:48PM +, Chris Wilson wrote:
As Broadwell has an increased virtual address size, it requires more
than 32 bits to store offsets into its address space. This includes the
debug registers to track
On Thu, 20 Mar 2014, David Woodhouse dw...@infradead.org wrote:
On Thu, 2014-03-20 at 09:36 +0200, Jani Nikula wrote:
Or an additional knob, in case it's really not working and people want
to get other things depending on prelim hw support done.
Yeah. Perhaps the best answer is a
On Thu, Mar 20, 2014 at 8:49 AM, David Woodhouse dw...@infradead.org wrote:
On Thu, 2014-03-20 at 09:36 +0200, Jani Nikula wrote:
Or an additional knob, in case it's really not working and people want
to get other things depending on prelim hw support done.
Yeah. Perhaps the best answer is a
Hi Damien,
On Wed, 2014-03-19 at 15:10 +, Damien Lespiau wrote:
On Sat, Mar 08, 2014 at 01:51:18PM +0530, sagar.a.kam...@intel.com wrote:
From: Sagar Kamble sagar.a.kam...@intel.com
This patch enables property for changin the pixel format
of plane to enable/disable pre-multiplied
On Mon, Mar 17, 2014 at 10:48:57PM -0700, Ben Widawsky wrote:
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_debugfs.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
On Mon, Mar 17, 2014 at 10:48:57PM -0700, Ben Widawsky wrote:
static void print_ppgtt(struct seq_file *m, struct i915_hw_ppgtt *ppgtt,
const char *name)
{
seq_printf(m, %s:\n, name);
seq_printf(m, pd gtt offset: 0x%08x\n, ppgtt-pd.pd_offset);
+ seq_printf(m, \tpd pages:
On Thu, 2014-03-20 at 10:45 +0100, Daniel Vetter wrote:
I'd agree that this would be nice, but my maintainer time is not
endless and when I have users screaming regression I do have to do
something. And yeah with the track record set of some of the earliest
vtd+gfx chips I'm fairly aggressive
On Wed, 19 Mar 2014, Siva Chandra sivachan...@google.com wrote:
On Wed, Mar 19, 2014 at 8:03 AM, Damien Lespiau
damien.lesp...@intel.com wrote:
On Wed, Mar 19, 2014 at 09:44:38AM +0100, Daniel Vetter wrote:
On Tue, Mar 18, 2014 at 01:53:56PM -0700, Siva Chandra wrote:
We are testing a few
On Fri, Dec 06, 2013 at 02:11:55PM -0800, Ben Widawsky wrote:
static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
{
+#define GEN6_PD_ALIGN (PAGE_SIZE * 16)
+#define GEN6_PD_SIZE (GEN6_PPGTT_PD_ENTRIES * PAGE_SIZE)
struct drm_device *dev = ppgtt-base.dev;
struct
On Fri, Dec 06, 2013 at 02:11:56PM -0800, Ben Widawsky wrote:
The patch before this changed the way in which we allocate space for the
PPGTT PDEs. It began carving out the PPGTT PDEs (which live in the
Global GTT) from the GGTT's drm_mm. Prior to that patch, the PDEs were
hidden from the
On Thu, Mar 20, 2014 at 03:29:42PM +0530, Sagar Arun Kamble wrote:
Hi Damien,
On Wed, 2014-03-19 at 15:10 +, Damien Lespiau wrote:
On Sat, Mar 08, 2014 at 01:51:18PM +0530, sagar.a.kam...@intel.com wrote:
From: Sagar Kamble sagar.a.kam...@intel.com
This patch enables property
On Mon, Mar 17, 2014 at 10:48:33PM -0700, Ben Widawsky wrote:
There often is not enough memory to dump the full contents of the PPGTT.
As a temporary bandage, to continue getting valuable basic PPGTT info,
wrap the dangerous, memory hungry part inside of a new verbose version
of the debugfs
On Sat, Mar 08, 2014 at 01:51:16PM +0530, sagar.a.kam...@intel.com wrote:
From: Sagar Kamble sagar.a.kam...@intel.com
This patch creates a generic blending enum property.
Drivers may support subset of these values.
Cc: airl...@linux.ie
Cc: dri-de...@lists.freedesktop.org
Cc:
On Thu, Mar 20, 2014 at 11:57:42AM +, Chris Wilson wrote:
static void gen6_ppgtt_info(struct seq_file *m, struct drm_device *dev, bool
verbose)
@@ -1838,14 +1841,11 @@ static void gen6_ppgtt_info(struct seq_file *m,
struct drm_device *dev, bool ver
On Mon, Mar 17, 2014 at 10:48:56PM -0700, Ben Widawsky wrote:
+static DECLARE_BITMAP(new_page_tables, I915_PDES_PER_PD);
It is only 64 bytes, I think we can accommodate that on stack.
Otherwise, I could barely find anything to quibble about.
-Chris
--
Chris Wilson, Intel Open Source
On Mon, Mar 17, 2014 at 10:48:32PM -0700, Ben Widawsky wrote:
Okay, so what does this do?
The patch series /dynamicizes/ page table allocation and teardown for
GEN7. It also starts to introduce GEN8, but the tricky stuff is still
not done. Up until now, all our page tables are pre-allocated
On Tue, 18 Feb 2014, bradley.d.vol...@intel.com wrote:
+static u32 gen7_render_get_cmd_length_mask(u32 cmd_header)
+{
+ u32 client = (cmd_header INSTR_CLIENT_MASK) INSTR_CLIENT_SHIFT;
+ u32 subclient =
+ (cmd_header INSTR_SUBCLIENT_MASK) INSTR_SUBCLIENT_SHIFT;
+
+
On Fri, 2014-03-07 at 20:12 -0300, Paulo Zanoni wrote:
From: Paulo Zanoni paulo.r.zan...@intel.com
Now that we don't keep the hotplug interrupts enabled anymore, we can
kill the regsave struct and just cal the normal IRQ preinstall,
postinstall and uninstall functions. This makes it easier
On Fri, 2014-03-07 at 20:12 -0300, Paulo Zanoni wrote:
From: Paulo Zanoni paulo.r.zan...@intel.com
We're adding runtime suspend support to more platforms, so organize
the code in a way that all a new platform needs to do is to add its
own gen-specific functions. Also rename the i915_
The locking in drm_fb_helper_initial_config is a bit troublesome for a
few reasons:
- We can't just wrap the entire function up into modeset locks since
the fbdev registration might call down into fbcon code, which then
through our -set_par implementation needs to be able to grab all
We have two calling contexts for thise function:
- In the crtc helper code itself as part of the -set_config
implementation. In this calling context all modeset locks are
already held, as they should.
- In drivers not implementing fastboot before the fbdev/fbcon setup
and initialization.
On Thu, Mar 20, 2014 at 02:01:21PM +0100, Daniel Vetter wrote:
We have two calling contexts for thise function:
- In the crtc helper code itself as part of the -set_config
implementation. In this calling context all modeset locks are
already held, as they should.
- In drivers not
The locking in drm_fb_helper_initial_config is a bit troublesome for a
few reasons:
- We can't just wrap the entire function up into modeset locks since
the fbdev registration might call down into fbcon code, which then
through our -set_par implementation needs to be able to grab all
We have two calling contexts for thise function:
- In the crtc helper code itself as part of the -set_config
implementation. In this calling context all modeset locks are
already held, as they should.
- In drivers not implementing fastboot before the fbdev/fbcon setup
and initialization.
On Thu, 20 Mar 2014, Siva Chandra sivachan...@google.com wrote:
On Thu, Mar 20, 2014 at 3:52 AM, Jani Nikula
jani.nik...@linux.intel.com wrote:
If this is for testing only, and the module parameter does not quite cut
it, please add it to debugfs. That we can pretty much change at will.
If I
On Fri, 2014-03-07 at 20:12 -0300, Paulo Zanoni wrote:
From: Paulo Zanoni paulo.r.zan...@intel.com
Now that PC8 is part of runtime PM, the check is useless.
Signed-off-by: Paulo Zanoni paulo.r.zan...@intel.com
Looks ok. It could be applied already after 2/6.
Reviewed-by: Imre Deak
On Thu, Mar 20, 2014 at 02:26:34PM +0100, Daniel Vetter wrote:
We have two calling contexts for thise function:
- In the crtc helper code itself as part of the -set_config
implementation. In this calling context all modeset locks are
already held, as they should.
- In drivers not
On Wed, Mar 19, 2014 at 05:41:37PM -0700, Ben Widawsky wrote:
I can't say it's completely unexpected that this would be your response,
but I do feel like you've ignored my argument that this is better than
the current situation. Not merging this patch only keeps things bad.
So I'd like you
On Thu, Mar 20, 2014 at 07:30:52AM +, Chris Wilson wrote:
On Wed, Mar 19, 2014 at 06:31:13PM -0700, Ben Widawsky wrote:
With the renamed RPS struct members, it's easier to skip the local
variables which no longer clarify anything, and if anything just make
the code harder to read.
On Thu, Mar 20, 2014 at 11:38:18AM +, Damien Lespiau wrote:
On Thu, Mar 20, 2014 at 03:29:42PM +0530, Sagar Arun Kamble wrote:
Hi Damien,
On Wed, 2014-03-19 at 15:10 +, Damien Lespiau wrote:
On Sat, Mar 08, 2014 at 01:51:18PM +0530, sagar.a.kam...@intel.com wrote:
From:
On Sat, Mar 08, 2014 at 01:51:17PM +0530, sagar.a.kam...@intel.com wrote:
From: Sagar Kamble sagar.a.kam...@intel.com
This patch enables constant alpha property for Sprite planes.
Client has to set BIT(DRM_BLEND_CONSTANT_ALPHA) | (8 bit alpha value)
for applying constant alpha on a plane. To
On Thu, Mar 20, 2014 at 02:51:20PM +0100, Daniel Vetter wrote:
I don't really have a decent opinion on the pre-multiplied vs
non-premultiplied ARGB formats issue at hand. In case of doubt I think we
should follow what gl does. But I have no clue how that's handled in gl
;-)
I'd still like a
On Thu, Mar 20, 2014 at 07:40:37AM +, Chris Wilson wrote:
On Wed, Mar 19, 2014 at 09:42:49PM -0700, Ben Widawsky wrote:
On Wed, Mar 19, 2014 at 01:45:46PM +, Chris Wilson wrote:
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
Any clue how you intend to use this for a commit
On Sat, Mar 08, 2014 at 01:51:15PM +0530, sagar.a.kam...@intel.com wrote:
From: Sagar Kamble sagar.a.kam...@intel.com
This patch series introduces drm property modelled after glBlendFuc function.
For i915
constant alpha is exposed through this property to start with. Additional new
On Sat, Mar 08, 2014 at 01:51:16PM +0530, sagar.a.kam...@intel.com wrote:
From: Sagar Kamble sagar.a.kam...@intel.com
This patch creates a generic blending enum property.
Drivers may support subset of these values.
Cc: airl...@linux.ie
Cc: dri-de...@lists.freedesktop.org
Cc:
On Wed, Mar 19, 2014 at 09:31:35PM -0700, Ben Widawsky wrote:
On Mon, Mar 17, 2014 at 07:43:35PM +, Rob Bradford wrote:
[snip]
lgtm. Put the commit message in the test description and call it
Reviewed-by: Ben Widawsky b...@bwidawsk.net
igt_assert_cmpint is a useful one, especially for
The computation of required framebuffer size in
commit d978ef14456a38034f6c0e94a794129501f89200
Author: Jesse Barnes jbar...@virtuousgeek.org
Date: Fri Mar 7 08:57:51 2014 -0800
drm/i915: Wrap the preallocated BIOS framebuffer and preserve for KMS fbcon
v12
is too optimistic, and would
On Thu, Mar 20, 2014 at 07:54:19AM +, Chris Wilson wrote:
On Wed, Mar 19, 2014 at 04:06:38PM -0700, Ben Widawsky wrote:
On Wed, Mar 19, 2014 at 09:54:48PM +, Chris Wilson wrote:
As Broadwell has an increased virtual address size, it requires more
than 32 bits to store offsets into
On Thu, Mar 20, 2014 at 04:49:30PM +0200, Jani Nikula wrote:
On Thu, 20 Mar 2014, Siva Chandra sivachan...@google.com wrote:
On Thu, Mar 20, 2014 at 6:25 AM, Jani Nikula
jani.nik...@linux.intel.com wrote:
On Thu, 20 Mar 2014, Siva Chandra sivachan...@google.com wrote:
On Thu, Mar 20, 2014
On Mon, 2014-03-10 at 17:06 +0530, sagar.a.kam...@intel.com wrote:
From: Sagar Kamble sagar.a.kam...@intel.com
With this patch we allow larger cursor planes of sizes 128x128
and 256x256.
v2: Added more precise check on size while setting cursor plane.
v3: Changes related to
On Mon, 2014-03-10 at 17:06 +0530, sagar.a.kam...@intel.com wrote:
From: Sagar Kamble sagar.a.kam...@intel.com
With this patch we allow larger cursor planes of sizes 128x128
and 256x256.
v2: Added more precise check on size while setting cursor plane.
v3: Changes related to
On Tue, 2014-03-18 at 15:59 +0530, sagar.a.kam...@intel.com wrote:
From: Sagar Kamble sagar.a.kam...@intel.com
v1: Added 128x128 and 256x256 cursor size support.
v2: Refined the test to use igt_subtest_f and automate enumeration.
v3: Restructuring test enumeration using drmGetCap.
On Thu, Mar 20, 2014 at 04:17:26PM +0100, Daniel Vetter wrote:
On Thu, Mar 20, 2014 at 07:54:19AM +, Chris Wilson wrote:
On Wed, Mar 19, 2014 at 04:06:38PM -0700, Ben Widawsky wrote:
On Wed, Mar 19, 2014 at 09:54:48PM +, Chris Wilson wrote:
As Broadwell has an increased virtual
On Thu, Mar 20, 2014 at 06:18:05PM +0200, Imre Deak wrote:
On Tue, 2014-03-18 at 15:59 +0530, sagar.a.kam...@intel.com wrote:
From: Sagar Kamble sagar.a.kam...@intel.com
v1: Added 128x128 and 256x256 cursor size support.
v2: Refined the test to use igt_subtest_f and automate
On Thu, Mar 20, 2014 at 5:28 PM, Chris Wilson ch...@chris-wilson.co.uk wrote:
I wasn't sure either, but I thought since we didn't do anything special
for BBADDR, to leave ACTHD alone.
I wonder if it would help splitting it up, having to count 8 extra
leading zeros is going to be a
On Thu, Mar 20, 2014 at 05:30:43PM +0200, Imre Deak wrote:
On Mon, 2014-03-10 at 17:06 +0530, sagar.a.kam...@intel.com wrote:
From: Sagar Kamble sagar.a.kam...@intel.com
With this patch we allow larger cursor planes of sizes 128x128
and 256x256.
v2: Added more precise check on size
On 03/19/2014 09:54 PM, Chris Wilson wrote:
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 7a01911c16f8..a6ceb2c6f36d 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -417,13 +417,19 @@
Thanks Daniel.
On Thu, 2014-03-20 at 17:33 +0100, Daniel Vetter wrote:
On Thu, Mar 20, 2014 at 06:18:05PM +0200, Imre Deak wrote:
On Tue, 2014-03-18 at 15:59 +0530, sagar.a.kam...@intel.com wrote:
From: Sagar Kamble sagar.a.kam...@intel.com
v1: Added 128x128 and 256x256 cursor size
Broadwell introduces large address spaces, greater than 32bits in width.
These require that we then store and print 64bit values. If we were to
zero pad them out to 16 hexadecimal places, we have to carefully count
the leading zeroes - which is easy to make a mistake. Conversely, if we
do not zero
On Thu, 20 Mar 2014 14:42:32 +0100
Daniel Vetter dan...@ffwll.ch wrote:
On Wed, Mar 19, 2014 at 05:41:37PM -0700, Ben Widawsky wrote:
I can't say it's completely unexpected that this would be your response,
but I do feel like you've ignored my argument that this is better than
the current
Cc: Kenneth Graunke kenn...@whitecape.org
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gem_context.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
b/drivers/gpu/drm/i915/i915_gem_context.c
On Thu, 20 Mar 2014 10:30:32 -0700
Jesse Barnes jbar...@virtuousgeek.org wrote:
On Thu, 20 Mar 2014 14:42:32 +0100
Daniel Vetter dan...@ffwll.ch wrote:
On Wed, Mar 19, 2014 at 05:41:37PM -0700, Ben Widawsky wrote:
I can't say it's completely unexpected that this would be your response,
On Thu, Mar 20, 2014 at 05:56:20PM +0100, Peter Senna Tschudin wrote:
When Fedora updated the Kernel package from 3.12 to 3.13 my notebook
stopped booting (Kernel freezes) when a 2560 x 1440 high res monitor
is attached. I have tried using 3.13.6 from kernel.org and the problem
persists. The
Populate PAR in infoframe structure. If there is a user setting for PAR, then
that value is set. Else, value is taken from CEA mode list if VIC is found.
Else, PAR is calculated from resolution. If none of these conditions are
satisfied, PAR is NONE as per initialization.
As a next step, create a
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