On Thu, May 01, 2014 at 01:55:23PM +, Barbalho, Rafael wrote:
-Original Message-
From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
Of ville.syrj...@linux.intel.com
Sent: Wednesday, April 09, 2014 11:28 AM
To: intel-gfx@lists.freedesktop.org
Subject:
From: Ville Syrjälä ville.syrj...@linux.intel.com
Due to Pipe C DPINVGTT has more bits on CHV.
v2: Fix comment to say VLV/CHV (Rafael)
Reviewed-by: Rafael Barbalho rafael.barba...@intel.com
Signed-off-by: Ville Syrjälä ville.syrj...@linux.intel.com
---
drivers/gpu/drm/i915/i915_reg.h | 12
On Fri, May 02, 2014 at 11:19:27AM +0300, Ville Syrjälä wrote:
On Thu, May 01, 2014 at 06:47:54PM -0700, Ben Widawsky wrote:
Restriction :
The offset must be greater than 4K bytes, avoiding the first 4KB of
stolen memory.
Isn't this a more generic issue that we must avoid the first 4k?
On 05/01/2014 07:47 PM, Ben Widawsky wrote:
On Wed, Feb 26, 2014 at 04:41:41PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin tvrtko.ursu...@intel.com
Allow userptr objects to be created and used via libdrm_intel.
At the moment tiling and mapping to GTT aperture is not supported
due
Without root we used to get EPERM if we tried to aquire
default context statistics. Now we have per fd statistics
so only thing which is hidden from us without root access,
is the global reset count.
Drop EPERM and check that global reset count is always zero
for nonroot.
Signed-off-by: Mika
From: Chon Ming Lee chon.ming@intel.com
Added programming PLL for CHV based on Application note for 1273 CHV
Display phy.
v2: -Break the common lane reset into another patch.
-Break the clock calculation into another patch.
-The changes are based on Ville review.
-Rework based
On Fri, May 02, 2014 at 04:00:25PM +0300, Ville Syrjälä wrote:
On Fri, May 02, 2014 at 09:38:11AM +0100, Chris Wilson wrote:
On Fri, May 02, 2014 at 11:19:27AM +0300, Ville Syrjälä wrote:
On Thu, May 01, 2014 at 06:47:54PM -0700, Ben Widawsky wrote:
Restriction :
The offset must be
On Fri, May 02, 2014 at 11:27:45AM +0100, Tvrtko Ursulin wrote:
On 05/01/2014 07:47 PM, Ben Widawsky wrote:
On Wed, Feb 26, 2014 at 04:41:41PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin tvrtko.ursu...@intel.com
Allow userptr objects to be created and used via libdrm_intel.
At the
On Fri, Apr 18, 2014 at 08:27:04AM +0100, Chris Wilson wrote:
Currently objects for which the hardware needs a contiguous physical
address are allocated a shadow backing storage to satisfy the contraint.
This shadow buffer is not wired into the normal obj-pages and so the
physical object is
Hi all!
On Thursday, April 24, 2014 01:17:14 PM Ville Syrjälä wrote:
On Thu, Apr 24, 2014 at 11:25:15AM +0300, Abdiel Janulgue wrote:
On Thursday, April 24, 2014 07:06:34 AM Chris Wilson wrote:
On Thu, Apr 24, 2014 at 09:08:14AM +0300, Abdiel Janulgue wrote:
Anyway I haven't tried the
On Fri, May 02, 2014 at 10:00:01AM -0700, Ben Widawsky wrote:
On Fri, May 02, 2014 at 04:00:25PM +0300, Ville Syrjälä wrote:
On Fri, May 02, 2014 at 09:38:11AM +0100, Chris Wilson wrote:
On Fri, May 02, 2014 at 11:19:27AM +0300, Ville Syrjälä wrote:
On Thu, May 01, 2014 at 06:47:54PM
On Tue, Apr 22, 2014 at 08:19:44PM +0300, Mika Kuoppala wrote:
These are generated with intel-gpu-tools/tools/null_state_gen.
I couldn't find the patches adding this to intel-gpu-tools. Mind posting
them here (or probably just push them to i-g-t?)
Thanks,
--
Damien
On Fri, May 02, 2014 at 09:43:29PM +0100, Damien Lespiau wrote:
On Tue, Apr 22, 2014 at 08:19:44PM +0300, Mika Kuoppala wrote:
These are generated with intel-gpu-tools/tools/null_state_gen.
I couldn't find the patches adding this to intel-gpu-tools. Mind posting
them here (or probably just
On Fri, May 02, 2014 at 09:35:20PM +0100, Chris Wilson wrote:
On Fri, May 02, 2014 at 10:00:01AM -0700, Ben Widawsky wrote:
On Fri, May 02, 2014 at 04:00:25PM +0300, Ville Syrjälä wrote:
On Fri, May 02, 2014 at 09:38:11AM +0100, Chris Wilson wrote:
On Fri, May 02, 2014 at 11:19:27AM
Each ring only has ring-1 sync seqnos. It is a bug to try to print
extra.
This should be squashed into drm/i915: semaphore debugfs. I don't have
an easy way at the moment to do the rebase and resend, but that is what
should be done.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
15 matches
Mail list logo
