Re: [Intel-gfx] [PATCH 3/4] drm/i915: CSC color correction

2014-09-09 Thread Daniel Vetter
On Tue, Sep 09, 2014 at 06:30:09PM -0700, Matt Roper wrote: > On Tue, Sep 09, 2014 at 11:53:15AM +0530, shashank.sha...@intel.com wrote: > > From: Shashank Sharma > > > > This patch adds support for CSC correction color property. > > It does the following: > > 1. Creates a new DRM property for CS

Re: [Intel-gfx] [RFC 1/3] drm/i915: remove !enabled handling from commit primary plane step

2014-09-09 Thread Daniel Vetter
On Tue, Sep 09, 2014 at 06:58:47PM +0300, Ville Syrjälä wrote: > On Tue, Sep 09, 2014 at 11:43:19AM -0300, Gustavo Padovan wrote: > > From: Gustavo Padovan > > > > The !crtc->enabled case will now be handled by the !visible code, > > since the handling is basically the same. > > > > Signed-off-b

Re: [Intel-gfx] [RFC 2/3] drm/i915: create intel_update_pipe_size()

2014-09-09 Thread Daniel Vetter
On Tue, Sep 09, 2014 at 02:43:14PM -0300, Gustavo Padovan wrote: > 2014-09-09 Ville Syrjälä : > > > On Tue, Sep 09, 2014 at 11:43:20AM -0300, Gustavo Padovan wrote: > > > From: Gustavo Padovan > > > > > > Factor out a piece of code from intel_pipe_set_base() that updates > > > the pipe size and

Re: [Intel-gfx] [PATCH 3/4] drm/i915: CSC color correction

2014-09-09 Thread Matt Roper
On Tue, Sep 09, 2014 at 11:53:15AM +0530, shashank.sha...@intel.com wrote: > From: Shashank Sharma > > This patch adds support for CSC correction color property. > It does the following: > 1. Creates a new DRM property for CSC correction. Adds this into >mode_config. > 2. Attaches this CSC pr

Re: [Intel-gfx] [PATCH 2/4] drm/i915: Plug-in color manager attach

2014-09-09 Thread Matt Roper
On Tue, Sep 09, 2014 at 11:53:14AM +0530, shashank.sha...@intel.com wrote: > From: Shashank Sharma > > This patch does following things: > 1. Adds new function to attach color proprties with >corresponsing crtc / plane objects. > 2. Call these attach functions, from corresponding crtc/plane >

Re: [Intel-gfx] [PATCH 0/4] Color manager framework

2014-09-09 Thread Matt Roper
On Tue, Sep 09, 2014 at 11:53:12AM +0530, shashank.sha...@intel.com wrote: > From: Shashank Sharma > > Color manager is an extention to i915 driver which provides display > tuning and color-correction properties to user space, via DRM propery > interface.Different Intel platforms support differen

Re: [Intel-gfx] [PATCH 1/4] drm/i915: Color manager framework for valleyview

2014-09-09 Thread Matt Roper
On Tue, Sep 09, 2014 at 11:53:13AM +0530, shashank.sha...@intel.com wrote: > From: Shashank Sharma > > Color manager is a framework which adds drm properties for > color correction in I915 driver. This framework creates DRM > properties for each color correction feature, and attaches > it to appr

[Intel-gfx] [PATCH] tests: Kill pm_psr

2014-09-09 Thread Rodrigo Vivi
kms_psr_sink_crc check psr activity, residency and exit for screen updates. So this test is useless. Signed-off-by: Rodrigo Vivi --- tests/Makefile.sources | 1 - tests/pm_psr.c | 86 -- 2 files changed, 87 deletions(-) delete mode 100644

[Intel-gfx] [PATCH] tests/kms_psr_sink_crc: Check color ref CRC

2014-09-09 Thread Rodrigo Vivi
Black screen is forbidden on this test. So let's fail if sink crc shows it is back. Also there are many cases where we know for shure it should be all green, so let's check for them. Instead of checking colors we could print with sw using cairo and check if we have identical crc like cursor testc

[Intel-gfx] [PATCH] tests/kms_psr_sink_crc: Adding test debug options

2014-09-09 Thread Rodrigo Vivi
Just to make life easier and be eable to easily test with PSR disabled to know exactly what to expect when running it for real v3: Use igt_debug helpers and add env option for running with psr disabled on this test without have to recompile like v1 or changing igt infrastructure like v2. I tried

[Intel-gfx] [PATCH] tests/kms_sink_crc_basic: Wait 2 vblanks before grabing the new crc.

2014-09-09 Thread Rodrigo Vivi
Signed-off-by: Rodrigo Vivi --- tests/kms_sink_crc_basic.c | 15 ++- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/tests/kms_sink_crc_basic.c b/tests/kms_sink_crc_basic.c index a7febe8..69329bd 100644 --- a/tests/kms_sink_crc_basic.c +++ b/tests/kms_sink_crc_basic.c @

[Intel-gfx] [PATCH] tests/kms_sink_crc_basic: Simplify test by using igt_kms functions

2014-09-09 Thread Rodrigo Vivi
v2: sink CRC R, G and B might change depending on display. So let's split the colors and bitwise them. Signed-off-by: Rodrigo Vivi --- tests/kms_sink_crc_basic.c | 175 + 1 file changed, 82 insertions(+), 93 deletions(-) diff --git a/tests/kms_sink_cr

Re: [Intel-gfx] [PATCH 1/4] drm/i915: Color manager framework for valleyview

2014-09-09 Thread Bob Paauwe
On Tue, 9 Sep 2014 11:53:13 +0530 wrote: > From: Shashank Sharma > > Color manager is a framework which adds drm properties for > color correction in I915 driver. This framework creates DRM > properties for each color correction feature, and attaches > it to appropriate CRTC/plane based on the

Re: [Intel-gfx] [PATCH 3/4] drm/i915: CSC color correction

2014-09-09 Thread Bob Paauwe
On Tue, 9 Sep 2014 11:53:15 +0530 wrote: > From: Shashank Sharma > > This patch adds support for CSC correction color property. > It does the following: > 1. Creates a new DRM property for CSC correction. Adds this into >mode_config. > 2. Attaches this CSC property to calling CRTC. Creates

Re: [Intel-gfx] [PATCH] drm/i915: add cherryview specfic forcewake in execlists_elsp_write

2014-09-09 Thread Jesse Barnes
On Tue, 09 Sep 2014 21:45:08 +0530 Deepak S wrote: > > On Monday 08 September 2014 08:10 PM, Daniel Vetter wrote: > > On Mon, Sep 08, 2014 at 05:14:23PM +0300, Ville Syrjälä wrote: > >> On Mon, Sep 08, 2014 at 05:02:43PM +0300, Ville Syrjälä wrote: > >>> On Tue, Sep 09, 2014 at 07:14:16PM +0530,

[Intel-gfx] [PATCH] drm/i915: pin sprite fb only if it changed

2014-09-09 Thread Gustavo Padovan
From: Gustavo Padovan Optimize code avoiding helding dev mutex if old fb and current fb are the same. Signed-off-by: Gustavo Padovan --- drivers/gpu/drm/i915/intel_sprite.c | 23 ++- 1 file changed, 14 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_s

[Intel-gfx] [PATCH 1/3] drm/i915: remove !enabled handling from commit primary plane step

2014-09-09 Thread Gustavo Padovan
From: Gustavo Padovan The !crtc->enabled case will now be handled by the !visible code, since the handling is basically the same. Signed-off-by: Gustavo Padovan Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 26 -- 1 file changed, 26 deletions(-)

[Intel-gfx] [PATCH 2/3] drm/i915: create intel_update_pipe_size()

2014-09-09 Thread Gustavo Padovan
From: Gustavo Padovan Factor out a piece of code from intel_pipe_set_base() that updates the pipe size and adjust fitter. This will help refactor the update primary plane path. v2: use struct intel_crtc as argument to intel_update_pipe_size() Signed-off-by: Gustavo Padovan --- drivers/gpu/dr

[Intel-gfx] [PATCH 3/3] drm/i915: Merge of visible and !visible paths for primary planes

2014-09-09 Thread Gustavo Padovan
From: Gustavo Padovan Fold intel_pipe_set_base() in the update primary plane path merging pieces of code that are common to both paths. Basically the the pin/unpin procedures are the same for both paths and some checks can also be shared (some of the were moved to the check() stage) v2: take Vi

Re: [Intel-gfx] [RFC 2/3] drm/i915: create intel_update_pipe_size()

2014-09-09 Thread Gustavo Padovan
2014-09-09 Ville Syrjälä : > On Tue, Sep 09, 2014 at 11:43:20AM -0300, Gustavo Padovan wrote: > > From: Gustavo Padovan > > > > Factor out a piece of code from intel_pipe_set_base() that updates > > the pipe size and adjust fitter. > > > > This will help refactor the update primary plane path.

Re: [Intel-gfx] [RFC 3/3] drm/i915: Merge of visible and !visible paths for primary planes

2014-09-09 Thread Ville Syrjälä
On Tue, Sep 09, 2014 at 11:43:21AM -0300, Gustavo Padovan wrote: > From: Gustavo Padovan > > Fold intel_pipe_set_base() in the update primary plane path merging > pieces of code that are common to both paths. > > Basically the the pin/unpin procedures are the same for both paths > and some check

Re: [Intel-gfx] [RFC 1/3] drm/i915: remove !enabled handling from commit primary plane step

2014-09-09 Thread Ville Syrjälä
On Tue, Sep 09, 2014 at 11:43:19AM -0300, Gustavo Padovan wrote: > From: Gustavo Padovan > > The !crtc->enabled case will now be handled by the !visible code, > since the handling is basically the same. > > Signed-off-by: Gustavo Padovan > --- > drivers/gpu/drm/i915/intel_display.c | 26 --

Re: [Intel-gfx] [RFC 2/3] drm/i915: create intel_update_pipe_size()

2014-09-09 Thread Ville Syrjälä
On Tue, Sep 09, 2014 at 11:43:20AM -0300, Gustavo Padovan wrote: > From: Gustavo Padovan > > Factor out a piece of code from intel_pipe_set_base() that updates > the pipe size and adjust fitter. > > This will help refactor the update primary plane path. > > Signed-off-by: Gustavo Padovan > ---

Re: [Intel-gfx] [PATCH] drm/i915: Enable full PPGTT on gen7

2014-09-09 Thread Chris Wilson
On Tue, Sep 09, 2014 at 02:55:15PM +0100, Chris Wilson wrote: > Oh, wait. It just uses the default-context on each fd, i.e. doesn't > actually perform the context restores. Will check back later... A bit more experimentation (igt/gem_ppgtt/bcs-vs-rcs-ctxN) and I am happy that this was a non-issue.

Re: [Intel-gfx] [PATCH] drm/i915: Enable full PPGTT on gen7

2014-09-09 Thread Chris Wilson
On Tue, Sep 09, 2014 at 05:12:23PM +0200, Daniel Vetter wrote: > On Tue, Sep 09, 2014 at 02:55:15PM +0100, Chris Wilson wrote: > > Oh, wait. It just uses the default-context on each fd, i.e. doesn't > > actually perform the context restores. Will check back later... > > We should throw a ->switch_

Re: [Intel-gfx] [PATCH] drm/i915: Don't reinit hpd interrupts after gpu reset

2014-09-09 Thread Daniel Vetter
On Tue, Sep 09, 2014 at 04:03:15PM +0300, Ville Syrjälä wrote: > On Mon, Sep 08, 2014 at 06:17:18PM +0200, Daniel Vetter wrote: > > Somehow I've overlooked this when simplifying the irq reinit > > scheme on gen4.5+ in > > > > commit 78ad455fd229c6f6cc2f390ccbe0d8f1a62d55a9 > > Author: Daniel Vette

Re: [Intel-gfx] [PATCH] drm/i915: Enable full PPGTT on gen7

2014-09-09 Thread Daniel Vetter
On Tue, Sep 09, 2014 at 02:55:15PM +0100, Chris Wilson wrote: > On Tue, Sep 09, 2014 at 04:30:06PM +0300, Ville Syrjälä wrote: > > On Tue, Sep 09, 2014 at 02:07:24PM +0100, Chris Wilson wrote: > > > On Tue, Sep 09, 2014 at 12:41:34PM +, Thierry, Michel wrote: > > > > > > > > > > > > On Tue, S

[Intel-gfx] [RFC 2/3] drm/i915: create intel_update_pipe_size()

2014-09-09 Thread Gustavo Padovan
From: Gustavo Padovan Factor out a piece of code from intel_pipe_set_base() that updates the pipe size and adjust fitter. This will help refactor the update primary plane path. Signed-off-by: Gustavo Padovan --- drivers/gpu/drm/i915/intel_display.c | 71 +--- 1

[Intel-gfx] [RFC 3/3] drm/i915: Merge of visible and !visible paths for primary planes

2014-09-09 Thread Gustavo Padovan
From: Gustavo Padovan Fold intel_pipe_set_base() in the update primary plane path merging pieces of code that are common to both paths. Basically the the pin/unpin procedures are the same for both paths and some checks can also be shared (some of the were moved to the check() stage) Signed-off-

[Intel-gfx] [RFC 1/3] drm/i915: remove !enabled handling from commit primary plane step

2014-09-09 Thread Gustavo Padovan
From: Gustavo Padovan The !crtc->enabled case will now be handled by the !visible code, since the handling is basically the same. Signed-off-by: Gustavo Padovan --- drivers/gpu/drm/i915/intel_display.c | 26 -- 1 file changed, 26 deletions(-) diff --git a/drivers/gpu/d

Re: [Intel-gfx] [PATCH] drm/i915: Enable full PPGTT on gen7

2014-09-09 Thread Chris Wilson
On Tue, Sep 09, 2014 at 04:30:06PM +0300, Ville Syrjälä wrote: > On Tue, Sep 09, 2014 at 02:07:24PM +0100, Chris Wilson wrote: > > On Tue, Sep 09, 2014 at 12:41:34PM +, Thierry, Michel wrote: > > > > > > > > > On Tue, Sep 9, 2014 at 1:34 PM, Ville Syrjälä > > > wrote: > > > > On Tue, Sep 09

Re: [Intel-gfx] [PATCH] drm/i915: Enable full PPGTT on gen7

2014-09-09 Thread Ville Syrjälä
On Tue, Sep 09, 2014 at 02:07:24PM +0100, Chris Wilson wrote: > On Tue, Sep 09, 2014 at 12:41:34PM +, Thierry, Michel wrote: > > > > > > On Tue, Sep 9, 2014 at 1:34 PM, Ville Syrjälä > > wrote: > > > On Tue, Sep 09, 2014 at 12:57:11PM +0100, Chris Wilson wrote: > > > > On Fri, Sep 05, 2014

Re: [Intel-gfx] [PATCH] drm/i915: Enable full PPGTT on gen7

2014-09-09 Thread Chris Wilson
On Tue, Sep 09, 2014 at 12:41:34PM +, Thierry, Michel wrote: > > > On Tue, Sep 9, 2014 at 1:34 PM, Ville Syrjälä > wrote: > > On Tue, Sep 09, 2014 at 12:57:11PM +0100, Chris Wilson wrote: > > > On Fri, Sep 05, 2014 at 02:13:16PM +0100, Michel Thierry wrote: > > > > Use full PPGTT as the def

Re: [Intel-gfx] [PATCH] drm/i915: Don't reinit hpd interrupts after gpu reset

2014-09-09 Thread Ville Syrjälä
On Mon, Sep 08, 2014 at 06:17:18PM +0200, Daniel Vetter wrote: > Somehow I've overlooked this when simplifying the irq reinit > scheme on gen4.5+ in > > commit 78ad455fd229c6f6cc2f390ccbe0d8f1a62d55a9 > Author: Daniel Vetter > Date: Thu May 22 22:18:21 2014 +0200 > > drm/i915: Improve irq

Re: [Intel-gfx] [PATCH] drm/i915: Enable full PPGTT on gen7

2014-09-09 Thread Thierry, Michel
On Tue, Sep 9, 2014 at 1:34 PM, Ville Syrjälä wrote: > On Tue, Sep 09, 2014 at 12:57:11PM +0100, Chris Wilson wrote: > > On Fri, Sep 05, 2014 at 02:13:16PM +0100, Michel Thierry wrote: > > > Use full PPGTT as the default option in gen7. > > > Note that aliasing PPGTT is the default option for g

Re: [Intel-gfx] [PATCH i-g-t v2 5/6] lib: don't force HDMI or DP connectors on gen 7 and 8

2014-09-09 Thread Ville Syrjälä
On Fri, Sep 05, 2014 at 02:15:08PM +0200, Daniel Vetter wrote: > On Fri, Sep 05, 2014 at 10:52:08AM +0100, Thomas Wood wrote: > > Forcing HDMI or DP connectors on gen 7 and 8 doesn't currently work, so > > fail early to allow the test to skip if required. > > > > Signed-off-by: Thomas Wood > > --

Re: [Intel-gfx] [PATCH] drm/i915: Enable full PPGTT on gen7

2014-09-09 Thread Ville Syrjälä
On Tue, Sep 09, 2014 at 12:57:11PM +0100, Chris Wilson wrote: > On Fri, Sep 05, 2014 at 02:13:16PM +0100, Michel Thierry wrote: > > Use full PPGTT as the default option in gen7. > > Note that aliasing PPGTT is the default option for gen8 (see HAS_PPGTT). > > > > This may well come back to bite me

Re: [Intel-gfx] [PATCH] drm/i915: fix another use-after-free in i915_gem_evict_everything

2014-09-09 Thread Chris Wilson
On Tue, Sep 09, 2014 at 01:04:43PM +0100, Michel Thierry wrote: > Also here, i915_gem_evict_vm causes an unbind, which can end up dropping > the last ref to the ppgtt. > > Triggered by igt gem_evict_everything test. > Testcase: igt/gem_evict_everything > Signed-off-by: Michel Thierry Reviewed-by

[Intel-gfx] [PATCH] drm/i915: fix another use-after-free in i915_gem_evict_everything

2014-09-09 Thread Michel Thierry
Also here, i915_gem_evict_vm causes an unbind, which can end up dropping the last ref to the ppgtt. Triggered by igt gem_evict_everything test. Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/i915_gem_evict.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers

Re: [Intel-gfx] [PATCH] drm/i915: Enable full PPGTT on gen7

2014-09-09 Thread Chris Wilson
On Fri, Sep 05, 2014 at 02:13:16PM +0100, Michel Thierry wrote: > Use full PPGTT as the default option in gen7. > Note that aliasing PPGTT is the default option for gen8 (see HAS_PPGTT). > > This may well come back to bite me later. Indeed. So something I spotted was that bspec mentions that the

Re: [Intel-gfx] [PATCH] drm/i915: Wrap -EIO send-vblank event for failed pageflip in spinlock

2014-09-09 Thread Daniel Vetter
On Sun, Sep 07, 2014 at 06:21:16PM +0100, Chris Wilson wrote: > On Sun, Sep 07, 2014 at 04:51:12PM +0100, Chris Wilson wrote: > > drm_send_vblank_event() demands that we hold the event spinlock whilst > > calling it, so do so. > > > > Signed-off-by: Chris Wilson > > --- > > drivers/gpu/drm/i915/

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Drop any active reference before unbinding

2014-09-09 Thread Daniel Vetter
On Tue, Sep 09, 2014 at 07:02:43AM +0100, Chris Wilson wrote: > Before we process the final unbind on an object and move it to the > unbound list, it is semantically cleaner if there are no more active > references to the object. (An active reference would imply that it was > still being accessed b

[Intel-gfx] [PATCH] drm/i915: Objects on the unbound list may still have an active reference

2014-09-09 Thread Chris Wilson
Due to the lazy retirement semantics, even though we have unbound an object, it may still hold onto an active reference. So in the debug code, play safe. v2: Export i915_gem_shrink() rather than opencoding it. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_debugfs.c | 34 ++-

Re: [Intel-gfx] Updated drm-intel-testing

2014-09-09 Thread Daniel Vetter
On Tue, Sep 09, 2014 at 11:37:04AM +0200, Daniel Vetter wrote: > On Tue, Sep 09, 2014 at 05:08:58AM +, Sun, Yi wrote: > > Hi Daniel, > > > > Due to 2014Q3 release testing circle this week, QA will do this test in > > next week. > > Note that this means we'll miss the -rc5 cutoff Dave Airlie

Re: [Intel-gfx] [PATCH] drm/i915/edp: use lane count and link rate from DPCD for eDP

2014-09-09 Thread Daniel Vetter
On Tue, Sep 09, 2014 at 11:25:13AM +0300, Jani Nikula wrote: > eDP panels are generally designed to support only a single clock and > lane configuration. > > commit 56071a207602a451f0c46d3dcc8379b59ef576e2 > Author: Jani Nikula > Date: Tue May 6 14:56:52 2014 +0300 > > drm/i915: use lane c

[Intel-gfx] [PATCH] NEWS: New heading for 1.9

2014-09-09 Thread Daniel Vetter
Should be done post-release. Cc: Rodrigo Vivi Cc: Thomas Wood Signed-off-by: Daniel Vetter --- NEWS | 3 +++ 1 file changed, 3 insertions(+) diff --git a/NEWS b/NEWS index 957363c638fb..ffedb11445fe 100644 --- a/NEWS +++ b/NEWS @@ -1,3 +1,6 @@ +Release 1.9 (-XX-XX) +--

Re: [Intel-gfx] Updated drm-intel-testing

2014-09-09 Thread Daniel Vetter
On Tue, Sep 09, 2014 at 05:08:58AM +, Sun, Yi wrote: > Hi Daniel, > > Due to 2014Q3 release testing circle this week, QA will do this test in next > week. Note that this means we'll miss the -rc5 cutoff Dave Airlie put in place for feature pull request. I'll chat with him about this. -Daniel

Re: [Intel-gfx] [RFC] attempting to hide 30" monitor in kernel (raw)

2014-09-09 Thread Daniel Vetter
On Tue, Sep 09, 2014 at 04:28:05PM +1000, Dave Airlie wrote: > All these are on top of rc3 (also in my drm-mst-hide-monitor branch). > > So after talking to Keith and Daniel in Chicago I decided to give > another go at hiding the horror that is 30" 4k dual-panel MST > monitors in the kernel. > >

[Intel-gfx] [PATCH] drm/i915/edp: use lane count and link rate from DPCD for eDP

2014-09-09 Thread Jani Nikula
eDP panels are generally designed to support only a single clock and lane configuration. commit 56071a207602a451f0c46d3dcc8379b59ef576e2 Author: Jani Nikula Date: Tue May 6 14:56:52 2014 +0300 drm/i915: use lane count and link rate from VBT as minimums for eDP should have started using th

Re: [Intel-gfx] [PATCH 02/11] drm/i915: add config option to enable/disable DP MST

2014-09-09 Thread Jani Nikula
On Tue, 09 Sep 2014, Dave Airlie wrote: > From: Dave Airlie > > Since DP MST has new userspace requirements and any effort at trying > to shoehorn things into the something the current userspace can handle are > doomed, lets just put this behind a config option. > > This also adds a command line