Turned out to be much simpler on top of my latest atomic stuff than
what I've feared. Some details:
- Drop the modeset_lock_all snakeoil in drm_plane_init. Same
justification as for the equivalent change in drm_crtc_init done in
commit d0fa1af40e784aaf7ebb7ba8a17b229bb3fa4c21
On Fri, Oct 31, 2014 at 01:53:52PM +, Chris Wilson wrote:
We use the obj-map_and_fenceable hint for when we already have a
valid mapping of this object in the aperture. This hint can only apply
to the GGTT and not to the aliasing-ppGTT. One user of the hint is
execbuffer relocation, which
On Fri, Oct 31, 2014 at 05:06:39PM +0100, Daniel Vetter wrote:
On Wed, Oct 29, 2014 at 02:42:29PM +0100, Thierry Reding wrote:
On Wed, Oct 22, 2014 at 11:45:23AM +0530, sonika.jin...@intel.com wrote:
From: Sonika Jindal sonika.jin...@intel.com
v2: Reading DP_EDP_REV, only when
On Mon, Nov 3, 2014 at 9:25 AM, Thierry Reding tred...@nvidia.com wrote:
The idea is that you'd grab the DPCD field anyway since it's needed all
over the place. We have a pile of helpers already that take exactly this
block and decode parts of it. So I think this makes sense - dp aux is fast
On Mon, Nov 03, 2014 at 12:07:02AM +0100, Daniel Vetter wrote:
Turned out to be much simpler on top of my latest atomic stuff than
what I've feared. Some details:
- Drop the modeset_lock_all snakeoil in drm_plane_init. Same
justification as for the equivalent change in drm_crtc_init done
On Mon, Nov 3, 2014 at 9:42 AM, Ville Syrjälä
ville.syrj...@linux.intel.com wrote:
Were you planning to convert setplane over to this?
Well yeah, I've forgotten about that one ... Will fix and resend.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 -
On Mon, Nov 3, 2014 at 10:02 AM, Daniel Vetter daniel.vet...@ffwll.ch wrote:
On Mon, Nov 3, 2014 at 9:42 AM, Ville Syrjälä
ville.syrj...@linux.intel.com wrote:
Were you planning to convert setplane over to this?
Well yeah, I've forgotten about that one ... Will fix and resend.
Hm,
From: gsarora gagandeep.s.ar...@intel.com
Added Android.mk for intel_sprite_on.
Signed-off-by: Gagandeep S Arora gagandeep.s.ar...@intel.com
---
Android.mk | 2 +-
demos/Android.mk| 27 ++
demos/intel_sprite_on.c | 61
Hi,
I have a Macbook Air (2013) (6,2) which until recently was working
flawlessly with Debian unstable, which I use almost exclusively on that
machine. I did keep the OSX installation, mainly because it's the only
way to get firmware updates.
Recently, in a moment of weakness, I said yes to the
On Tue, Oct 28, 2014 at 11:20:37AM -0200, Paulo Zanoni wrote:
2014-05-19 11:19 GMT-03:00 ville.syrj...@linux.intel.com:
From: Ville Syrjälä ville.syrj...@linux.intel.com
On pre-HSW we have two encoders per digital port: one HDMI, one DP.
However they are the same physical port in
On Sat, 01 Nov 2014, Ortwin Glück o...@odi.ch wrote:
Hi,
Since 3.18-rc1 backlight is dark after resume from suspend. This is on a
Samsung
laptop with i5 IvyBridge
00:02.0 VGA compatible controller: Intel Corporation 3rd Gen Core processor
Graphics Controller (rev 09)
I have bisected
On Tue, Oct 28, 2014 at 03:09:07PM +, John Harrison wrote:
On 19/10/2014 15:12, Daniel Vetter wrote:
On Mon, Oct 06, 2014 at 03:15:25PM +0100, john.c.harri...@intel.com wrote:
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
I think
On pre-ddi platforms we don't shut down the link when changing link
training parameters. Except when clock recovery fails too hard and we
restart with channel eq training. Which doesn't make a lot of sense
really, since just stopping/restarting the DP port at this point
violates the modeset
On Tue, 2014-10-28 at 11:45 -0700, Rodrigo Vivi wrote:
Altought VLV/CHV PSR supports per pipe PSR on VLV it isn't available
on pipe C.
Cherryview supports on all 3 pipes.
Signed-off-by: Rodrigo Vivi rodrigo.v...@intel.com
---
drivers/gpu/drm/i915/intel_dp.c | 8
1 file changed,
On Tue, Oct 28, 2014 at 02:03:14PM +, John Harrison wrote:
On 19/10/2014 15:09, Daniel Vetter wrote:
We have places that shovel stuff onto the ring without an explicit
add_request. Or at least we've had, so this needs a full audit, and that
audit needs to be in the commit message.
Not
On Tue, Oct 28, 2014 at 02:01:52PM +, John Harrison wrote:
On 19/10/2014 13:55, Daniel Vetter wrote:
On Mon, Oct 06, 2014 at 03:15:13PM +0100, john.c.harri...@intel.com wrote:
From: John Harrison john.c.harri...@intel.com
To thin commit message.
Also I wonder whethere we should track
On Tue, Oct 28, 2014 at 03:36:29PM +, John Harrison wrote:
On 19/10/2014 15:14, Daniel Vetter wrote:
On Tue, Oct 07, 2014 at 05:47:29PM +0100, john.c.harri...@intel.com wrote:
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
Why? If
On Tue, Oct 28, 2014 at 03:55:21PM +, John Harrison wrote:
On 19/10/2014 15:15, Daniel Vetter wrote:
On Fri, Oct 10, 2014 at 12:41:12PM +0100, john.c.harri...@intel.com wrote:
From: John Harrison john.c.harri...@intel.com
For: VIZ-4377
Signed-off-by: john.c.harri...@intel.com
I think
On Tue, Oct 28, 2014 at 08:12:30PM +0200, Ville Syrjälä wrote:
On Tue, Oct 28, 2014 at 10:57:38AM -0700, Jesse Barnes wrote:
On Thu, 16 Oct 2014 20:52:33 +0300
ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
In case the cmnlane power well is
On Tue, Oct 28, 2014 at 04:47:14PM +0200, Imre Deak wrote:
On Tue, 2014-10-28 at 11:43 -0200, Paulo Zanoni wrote:
2014-10-28 11:12 GMT-02:00 Imre Deak imre.d...@intel.com:
On Mon, 2014-10-27 at 17:54 -0200, Paulo Zanoni wrote:
From: Paulo Zanoni paulo.r.zan...@intel.com
Because,
On Thu, Oct 30, 2014 at 12:59:09PM -0700, Rodrigo Vivi wrote:
[snip]
Thanks for the explanation.
I've copied most of them into the commmit message so that they'll stick
around.
Patch looks good.
Reviewed-by Rodrigo Vivi rodrigo.v...@intel.com
Queued for -next, thanks for the patch.
xf86-video-intel contains the file src/sna/fb/fb.h. Many source files
in src/sna and src/uxa, and even src/legacy/i810/i810_driver.c
#include fb.h
Given that xserver provides and installs fb/fb.h, I would like to change
the name of src/sna/fb/fb.h to something else to avoid the confusion
in
The optopt variable is not set if an invalid long option is used, so
check the current option character instead.
Signed-off-by: Thomas Wood thomas.w...@intel.com
---
tests/testdisplay.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/tests/testdisplay.c
Signed-off-by: Thomas Wood thomas.w...@intel.com
---
tests/testdisplay.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/testdisplay.c b/tests/testdisplay.c
index 8c6bc62..b7e1541 100644
--- a/tests/testdisplay.c
+++ b/tests/testdisplay.c
@@ -642,6 +642,7 @@ int main(int argc, char
Signed-off-by: Thomas Wood thomas.w...@intel.com
---
lib/tests/igt_command_line.sh | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/lib/tests/igt_command_line.sh b/lib/tests/igt_command_line.sh
index 7e6ca67..5cf2584 100755
--- a/lib/tests/igt_command_line.sh
+++
Signed-off-by: Thomas Wood thomas.w...@intel.com
---
configure.ac | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configure.ac b/configure.ac
index d3faa19..a2569b8 100644
--- a/configure.ac
+++ b/configure.ac
@@ -203,7 +203,7 @@ AC_DEFINE_UNQUOTED(TARGET_CPU_PLATFORM,
The igt_command_line.sh script was moved by commit 685e577 (Move library
selftests to lib/tests), but the location of the tests and the test
lists was not updated.
Cc: Daniel Vetter daniel.vet...@ffwll.ch
Signed-off-by: Thomas Wood thomas.w...@intel.com
---
lib/tests/Makefile.am | 4
On Mon, Nov 03, 2014 at 11:08:04AM +, Patrick Welche wrote:
xf86-video-intel contains the file src/sna/fb/fb.h. Many source files
in src/sna and src/uxa, and even src/legacy/i810/i810_driver.c
#include fb.h
Given that xserver provides and installs fb/fb.h, I would like to change
the
On Thu, Oct 30, 2014 at 11:38:20AM -0700, Jesse Barnes wrote:
On Wed, 29 Oct 2014 16:30:43 +0200
Ander Conselvan de Oliveira conselv...@gmail.com wrote:
On 10/23/2014 09:50 PM, Jesse Barnes wrote:
+static int intel_modeset_compute_config(struct drm_crtc *crtc,
s/drm_crtc/intel_crtc/
On Thu, Oct 30, 2014 at 10:40:53AM +, Chris Wilson wrote:
On Mon, Oct 27, 2014 at 10:08:29AM +0100, Daniel Vetter wrote:
On Fri, Oct 24, 2014 at 04:16:14PM +0100, Chris Wilson wrote:
On Fri, Oct 24, 2014 at 04:39:29PM +0200, Daniel Vetter wrote:
On Fri, Oct 24, 2014 at 12:11:11PM
On Tue, Oct 28, 2014 at 10:59:05AM -0700, Jesse Barnes wrote:
Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
On Thu, Oct 30, 2014 at 10:52:39AM +0200, Jani Nikula wrote:
On Wed, 29 Oct 2014, Rodrigo Vivi rodrigo.v...@gmail.com wrote:
Oh, I was going to review the rest... but based on this comment I
guess I might wait for a new v2 series right?
No, I think it was in reference to *your* comments!
On Mon, Oct 27, 2014 at 11:27:18AM -0700, Rodrigo Vivi wrote:
I'm not 100% convinced drm_select_eld will always cover this check... so
What do you think about changing it to a BUG_ON or at least a WARN_ON?
Please don't kill the driver with a BUG_ON, always use WARN_ON instead.
Except when the
On Fri, Oct 31, 2014 at 11:12:33AM +0200, Jani Nikula wrote:
We have drm_crtc_vblank_off very early in the disable sequence, and
drm_crtc_vblank_on very late in the enable sequence. Especially
early/late since
commit 4b3a9526fc3228e74011b88f58088336acd2c9e2
Author: Ville Syrjälä
On Tue, Oct 28, 2014 at 04:30:41PM +0200, Ville Syrjälä wrote:
On Tue, Oct 28, 2014 at 11:26:51AM -0200, Paulo Zanoni wrote:
+ /*
+ * We can't change the DDI type if we already have a
connected
+ * device on this port. The first time a DDI is
On Tue, Oct 28, 2014 at 05:48:34PM +0200, Imre Deak wrote:
On Tue, 2014-10-28 at 16:15 +0200, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
The pps timestamp initialization was accidentally lost on vlv/chv in
commit
On Tue, Oct 28, 2014 at 03:10:25PM +, Damien Lespiau wrote:
On Tue, Oct 28, 2014 at 03:03:53PM +, Thomas Wood wrote:
+extern const char* __igt_test_description __attribute__((weak));
+#define IGT_TEST_DESCRIPTION(a) const char* __igt_test_description = a;
It's usual to omit the ';'
On Tue, Oct 28, 2014 at 05:32:30PM +0200, Mika Kuoppala wrote:
When looking at the bug report logs with triggered
WARN_ON, the person doing bug triaging will have to
find exact kernel source and match file/line.
Attach the condition that triggered the WARN_ON
to kernel log. In most cases
On Tue, Oct 28, 2014 at 11:45:35AM -0700, Rodrigo Vivi wrote:
VLV PSR support PSR per pipe, including the status. So we have to check
if it is enabled per pipe on status.
Signed-off-by: Rodrigo Vivi rodrigo.v...@intel.com
---
drivers/gpu/drm/i915/intel_dp.c | 23 +--
1
On Tue, Oct 28, 2014 at 03:10:12PM +0200, Ander Conselvan de Oliveira wrote:
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/intel_sprite.c | 25 +
1 file changed, 25 insertions(+)
diff --git
On Mon, Nov 03, 2014 at 01:15:24PM +0100, Daniel Vetter wrote:
On Tue, Oct 28, 2014 at 04:30:41PM +0200, Ville Syrjälä wrote:
On Tue, Oct 28, 2014 at 11:26:51AM -0200, Paulo Zanoni wrote:
+ /*
+ * We can't change the DDI type if we already have a
connected
On Wed, Oct 29, 2014 at 05:30:52PM +, Thomas Wood wrote:
The check_ prefix ensures the test programs are not installed and are
only built when make check is run.
Signed-off-by: Thomas Wood thomas.w...@intel.com
This was actually fairly intentional since when developing I always forget
to
On 11/03/2014 02:33 PM, Daniel Vetter wrote:
On Tue, Oct 28, 2014 at 03:10:12PM +0200, Ander Conselvan de Oliveira wrote:
Signed-off-by: Ander Conselvan de Oliveira
ander.conselvan.de.olive...@intel.com
---
drivers/gpu/drm/i915/intel_sprite.c | 25 +
1 file changed,
On Fri, Oct 31, 2014 at 11:27:33AM +0200, Ville Syrjälä wrote:
On Thu, Oct 30, 2014 at 12:57:04PM -0700, Kenneth Graunke wrote:
Before we get too much further...we should check if libva is actually
broken.
I don't know if this means the sampler palette completely doesn't work, or
if
On Thu, Oct 30, 2014 at 05:35:55AM -0700, Rodrigo Vivi wrote:
It was identified that in some cases when moving cursor Hardware can do
mistake with idle_frame count. So Spec is being updated to use
2 as minimum idle_frames.
Reference:
On Fri, Oct 31, 2014 at 04:07:35PM +, Chris Wilson wrote:
On Fri, Oct 31, 2014 at 02:52:40PM +, Damien Lespiau wrote:
On Fri, Oct 31, 2014 at 12:00:26PM +, john.c.harri...@intel.com wrote:
From: John Harrison john.c.harri...@intel.com
If a ring failed to initialise for any
On Thu, Oct 30, 2014 at 03:41:56PM +, Dave Gordon wrote:
execlists_submit_context() always returns 0, which is redundant.
And its name is inaccurate, since it actually submits (up to)
TWO contextS. So we rename it, change it to void, and remove
the WARN_ON() testing its return value.
Fixes to both the LRC and the legacy ringbuffer code to correctly
calculate and update the available space in a ring.
The logical ring code was updating the software ring 'head' value
by reading the hardware 'HEAD' register. In LRC mode, this is not
valid as the hardware is not necessarily
It seems that inclusion of intel_xvmc.h is usually protected by INTEL_XVMC.
The unprotected inclusion in src/uda/i965_video.c doesn't seem to be
necessary so rather than protect it, the following should be sufficient?
Cheers,
Patrick
diff --git a/src/uxa/i965_video.c b/src/uxa/i965_video.c
More concise. Noticed while reviewing Ander's patch which touched a
lot of the pipe_has_type checks.
Signed-off-by: Daniel Vetter daniel.vet...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git
Checking for lvds/edp is wrong (since we also support dsi panels now)
and not terribly useless. If we want to be more intelligent about all
this then we need to look at the old state to figure out whether the
pfit adjustment is needed. This goes all the way back to the original
fastboot pfit
On Wed, Oct 29, 2014 at 11:32:30AM +0200, Ander Conselvan de Oliveira wrote:
+ if (num_encoders != 1)
+ WARN(1, %d encoders on crtc for pipe %c\n, num_encoders,
+ pipe_name(crtc-pipe));
I've folded the check into the WARN here.
-Daniel
--
Daniel Vetter
On Mon, 03 Nov 2014, Daniel Vetter daniel.vet...@ffwll.ch wrote:
Checking for lvds/edp is wrong (since we also support dsi panels now)
and not terribly useless. If we want to be more intelligent about all
wrong ... and not terribly useless? useful?
BR,
Jani.
this then we need to look at the
On Wed, Oct 29, 2014 at 11:32:33AM +0200, Ander Conselvan de Oliveira wrote:
It is possible for a mode set to fail if there aren't shared DPLLS that
match the new configuration requirement or other errors in clock
computation. If that step is executed after disabling crtcs, in the
failure case
On Mon, Nov 03, 2014 at 02:51:27PM +0100, Daniel Vetter wrote:
On Wed, Oct 29, 2014 at 11:32:33AM +0200, Ander Conselvan de Oliveira wrote:
It is possible for a mode set to fail if there aren't shared DPLLS that
match the new configuration requirement or other errors in clock
computation.
On Wed, Oct 29, 2014 at 11:32:29AM +0200, Ander Conselvan de Oliveira wrote:
Version 2 of the series with the comments I got so far resolved.
Ander Conselvan de Oliveira (9):
drm/i915: Make *_crtc_mode_set work on new_config
drm/i915: Convert shared dpll reference count to a crtc mask
On Wed, Oct 29, 2014 at 01:48:15PM +0200, Jani Nikula wrote:
On Wed, 29 Oct 2014, Damien Lespiau damien.lesp...@intel.com wrote:
As Paulo said when introducing the enum, having more types is really
good to document what should go where (int foo(int, int, bool, bool).
Cc: Paulo Zanoni
On Wed, Oct 29, 2014 at 12:03:45PM +, Damien Lespiau wrote:
Chris removed the code using it in:
commit be2d599b5da3936ca92e0187ff50b34b6b8ff997
Author: Chris Wilson ch...@chris-wilson.co.uk
Date: Wed Sep 10 19:52:18 2014 +0100
drm/i915: Remove dead code,
On Wed, Oct 29, 2014 at 03:20:47PM +, Thomas Wood wrote:
@@ -380,6 +382,7 @@ void igt_exit(void) __attribute__((noreturn));
*/
#define igt_require_f(expr, f...) do { \
if (!(expr)) igt_skip_check(#expr , f); \
+ else igt_debug(Test requirement passed: #expr\n); \
} while
Ville suggested that we should use the same semantics as C arrays to
reduce the number of those pesky +1/-1 in the allocation code.
This patch leaves the debugfs file as is, showing the internal DDB
allocation structure, not the values written in the registers.
v2: Remove the test on -end in
On Fri, Oct 31, 2014 at 05:38:31PM +0200, Mika Kuoppala wrote:
to move the interface to the ppgtt era.
Signed-off-by: Mika Kuoppala mika.kuopp...@intel.com
---
drivers/gpu/drm/i915/i915_gpu_error.c | 49
+++
1 file changed, 27 insertions(+), 22
It's really part of the push all new_* state into current state
pointers done in that function. So let's move it there to make this
clear.
Also, with the conversion done the num_shared_dpll check the function
does in it's loop is enough, so we can drop the check for the dpll
compute callback,
Hi Dave,
drm-intel-next-2014-10-24:
- suspend/resume/freeze/thaw unification from Imre
- wa list improvements from MikaArun
- display pll precomputation from Ander Conselvan prep work
- more kerneldoc for the interrupt code
- 180 rotation for cursors (VilleSonika)
- ULT/ULX feature check macros
On Tue, Nov 04, 2014 at 02:20:38PM +0530, Gagandeep S Arora wrote:
+/*
+ * The macros and structures inside the conditional statement
+ * #if (ANDROID_HAS_CAIRO == 1) are defined in lib/igt_kms.c
+ * when the flag ANDROID_HAS_CAIRO is 1.
+ */
+#if (ANDROID_HAS_CAIRO == 0)
+struct type_name
On Mon, Nov 03, 2014 at 03:49:32PM +0200, Jani Nikula wrote:
On Mon, 03 Nov 2014, Daniel Vetter daniel.vet...@ffwll.ch wrote:
Checking for lvds/edp is wrong (since we also support dsi panels now)
and not terribly useless. If we want to be more intelligent about all
wrong ... and not
On Mon, Nov 03, 2014 at 02:45:28PM +, Daniel Thompson wrote:
index 70bd67cf86e3..bd38df3cbe55 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -1429,7 +1429,7 @@ EXPORT_SYMBOL(drm_atomic_helper_set_config);
/**
*
On Mon, Nov 03, 2014 at 11:31:02AM +, Thomas Wood wrote:
Signed-off-by: Thomas Wood thomas.w...@intel.com
---
lib/tests/igt_command_line.sh | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/lib/tests/igt_command_line.sh b/lib/tests/igt_command_line.sh
index
On Wed, Oct 29, 2014 at 05:22:39PM +, Damien Lespiau wrote:
Skylake changed a few things here and there in the plane registers and we
weren't correctly reading out the primary plane state when trying to re-use
the
BIOS stolen allocated fb (especially the stride was all wrong). Of course,
On Mon, Nov 03, 2014 at 03:06:07PM +, Daniel Thompson wrote:
kfree is a nop when the argument is NULL, which is a crucial property of
this - memset would oops on driver load.
Oops. Missed that (I think I misread who as assuming there was always
obj-state in the patch header).
Do you
On Fri, Oct 31, 2014 at 01:53:52PM +, Chris Wilson wrote:
@@ -4091,6 +4078,7 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
}
}
+ bound = vma ? vma-bound : 0;
if (vma == NULL || !drm_mm_node_allocated(vma-node)) {
vma =
On Fri, Oct 31, 2014 at 01:53:53PM +, Chris Wilson wrote:
Always require PIN_GLOBAL when we want a mappable offset (PIN_MAPPABLE).
This causes the pin to fixup the global binding in cases were the vma
was already bound (and due to the proceeding bug, we considered it to be
already
To align with the ilk WM code and because it makes sense to test against
the upper bounds as soon as possible on variables that are bigger than
the number of bits in the register, let's move the maximum checks from
skl_compute_wm_results() to skl_compute_plane_wm().
v2: Leave the result values to
On Sat, Nov 01, 2014 at 05:05:57AM +, Damien Lespiau wrote:
The function was removed in:
commit 037bde19a43e299d30f0490bba9be32ab355975c
Author: Chris Wilson ch...@chris-wilson.co.uk
Date: Thu Mar 27 08:24:19 2014 +
Revert drm/i915: Disable/Enable PM Intrrupts based
On 02/11/14 13:19, Daniel Vetter wrote: The atomic users and helpers
assume that there is always a obj-state
structure around. Which means drivers need to somehow create that at
driver load time. Also it should obviously reset hardware state, so
needs to be reset upon resume.
Finally the
On 03/11/14 14:53, Daniel Vetter wrote:
On Mon, Nov 03, 2014 at 02:45:28PM +, Daniel Thompson wrote:
index 70bd67cf86e3..bd38df3cbe55 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -1429,7 +1429,7 @@
On Sat, Nov 01, 2014 at 06:08:00PM +0100, Christian Kastner wrote:
Hi,
I have a Macbook Air (2013) (6,2) which until recently was working
flawlessly with Debian unstable, which I use almost exclusively on that
machine. I did keep the OSX installation, mainly because it's the only
way to get
On Wed, Oct 29, 2014 at 09:52:50AM +, Thomas Daniel wrote:
No longer create a work item to clean each execlist queue item.
Instead, move retired execlist requests to a queue and clean up the
items during retire_requests.
v2: Fix legacy ring path broken during overzealous cleanup
v3:
On Wed, Oct 29, 2014 at 09:52:51AM +, Thomas Daniel wrote:
Write HWS_PGA address even in execlists mode as the global hardware status
page is still required. This address was previously uninitialized and
HWSP writes would clobber whatever buffer happened to reside at GGTT
address 0.
On Thu, Oct 30, 2014 at 04:39:36PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin tvrtko.ursu...@intel.com
Things like reliable GGTT mappings and mirrored 3d display will need to be
to map the same object twice into the GGTT.
Add a ggtt_view field per VMA and select the page view based
On Thu, Oct 30, 2014 at 04:39:37PM +, Tvrtko Ursulin wrote:
Just a sideline comment here for now ;-)
+/* intel_dma.c */
+int i915_st_set_pages(struct sg_table **st, struct page **pvec, int
num_pages);
Comments all over should tell you that i915_dma.c is super legacy
territory and really
On Thu, Oct 30, 2014 at 04:39:37PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin tvrtko.ursu...@intel.com
It will be used by other call sites shortly.
Signed-off-by: Tvrtko Ursulin tvrtko.ursu...@intel.com
---
drivers/gpu/drm/i915/i915_dma.c | 38 +
-Original Message-
From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
Vetter
Sent: Monday, November 03, 2014 3:33 PM
To: Daniel, Thomas
Cc: intel-gfx@lists.freedesktop.org; shuang...@linux.intel.com
Subject: Re: [Intel-gfx] [PATCH 1/4] drm/i915/bdw: Clean up
On 30/10/14 19:26, Ville Syrjälä wrote:
On Thu, Oct 30, 2014 at 10:32:38AM -0700, Kenneth Graunke wrote:
On Thursday, October 30, 2014 01:01:30 PM Ville Syrjälä wrote:
On Thu, Oct 30, 2014 at 02:32:40AM -0700, Kenneth Graunke wrote:
On Thursday, October 30, 2014 11:00:51 AM Ville Syrjälä
On Thu, Oct 30, 2014 at 04:39:38PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin tvrtko.ursu...@intel.com
It will help future code if this function knows something about of the context
of the display setup object is being pinned for.
Signed-off-by: Tvrtko Ursulin
On Mon, Nov 03, 2014 at 04:05:03PM +, Daniel, Thomas wrote:
-Original Message-
From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
Vetter
Sent: Monday, November 03, 2014 3:33 PM
To: Daniel, Thomas
Cc: intel-gfx@lists.freedesktop.org;
Motivated by the per-plane locking I've gone through all the get*
ioctls and reduced the locking to the bare minimum required.
Signed-off-by: Daniel Vetter daniel.vet...@intel.com
---
drivers/gpu/drm/drm_crtc.c | 43 +--
1 file changed, 17 insertions(+),
On 11/03/2014 04:02 PM, Daniel Vetter wrote:
On Thu, Oct 30, 2014 at 04:39:37PM +, Tvrtko Ursulin wrote:
Just a sideline comment here for now ;-)
+/* intel_dma.c */
+int i915_st_set_pages(struct sg_table **st, struct page **pvec, int num_pages);
Comments all over should tell you that
On Fri, Oct 31, 2014 at 11:48:01AM +0200, Ville Syrjälä wrote:
On Fri, Oct 31, 2014 at 11:35:52AM +0200, Ville Syrjälä wrote:
On Thu, Oct 30, 2014 at 05:51:49PM -0200, Paulo Zanoni wrote:
2014-10-30 15:42 GMT-02:00 ville.syrj...@linux.intel.com:
From: Ville Syrjälä
On Fri, Oct 31, 2014 at 11:40:36AM +0200, Ville Syrjälä wrote:
On Thu, Oct 30, 2014 at 06:12:51PM -0200, Paulo Zanoni wrote:
While trying to check for the correctness of the lines above, I
noticed that in __i915_enable_pipestat(), if the enable mask is
already what we want, we won't
On 11/03/2014 03:58 PM, Daniel Vetter wrote:
On Thu, Oct 30, 2014 at 04:39:36PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin tvrtko.ursu...@intel.com
Things like reliable GGTT mappings and mirrored 3d display will need to be
to map the same object twice into the GGTT.
Add a ggtt_view
On Thu, Oct 30, 2014 at 06:41:11PM -0200, Paulo Zanoni wrote:
2014-10-30 15:43 GMT-02:00 ville.syrj...@linux.intel.com:
gen8_gt_irq_postinstall(dev_priv);
@@ -3620,7 +3594,6 @@ static void valleyview_irq_uninstall(struct
drm_device *dev)
static void
On Thu, Oct 30, 2014 at 07:42:49PM +0200, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
After enabling the pipe-a power well on CHV I noticed that hpd and interrupts
didn't work too well anymore. The reason is the same as on VLV; the power well
kills
On Thu, Oct 30, 2014 at 03:52:45PM -0200, Paulo Zanoni wrote:
From: Paulo Zanoni paulo.r.zan...@intel.com
Fix the message, not the fault :)
This is what I see:
[ 282.108597] [drm:i915_check_and_clear_faults] Unexpected fault
[ 282.108597]Addr: 0x\n Address space:
On Thu, Oct 30, 2014 at 10:36:23PM +0200, Imre Deak wrote:
On Thu, 2014-10-30 at 15:59 -0200, Paulo Zanoni wrote:
From: Paulo Zanoni paulo.r.zan...@intel.com
With this patch, the RPS sequence for runtime suspend/resume is
exactly like the sequence for S3 suspend/resume:
-
On Mon, Nov 03, 2014 at 03:42:06PM +, Thomas Wood wrote:
On 3 November 2014 15:02, Daniel Vetter dan...@ffwll.ch wrote:
On Mon, Nov 03, 2014 at 11:31:02AM +, Thomas Wood wrote:
Signed-off-by: Thomas Wood thomas.w...@intel.com
---
lib/tests/igt_command_line.sh | 8
1
On Mon, Nov 03, 2014 at 04:34:29PM +, Tvrtko Ursulin wrote:
On 11/03/2014 03:58 PM, Daniel Vetter wrote:
On Thu, Oct 30, 2014 at 04:39:36PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin tvrtko.ursu...@intel.com
Things like reliable GGTT mappings and mirrored 3d display will need to
On Mon, Nov 03, 2014 at 04:18:30PM +, Tvrtko Ursulin wrote:
On 11/03/2014 04:02 PM, Daniel Vetter wrote:
On Thu, Oct 30, 2014 at 04:39:37PM +, Tvrtko Ursulin wrote:
Just a sideline comment here for now ;-)
+/* intel_dma.c */
+int i915_st_set_pages(struct sg_table **st, struct
On Wed, Oct 29, 2014 at 09:52:52AM +, Thomas Daniel wrote:
From: Oscar Mateo oscar.ma...@intel.com
Up until now, we have pinned every logical ring context backing object
during creation, and left it pinned until destruction. This made my life
easier, but it's a harmful thing to do,
-Original Message-
From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
Vetter
Sent: Monday, November 03, 2014 4:54 PM
To: Daniel, Thomas
Cc: intel-gfx@lists.freedesktop.org; shuang...@linux.intel.com
Subject: Re: [Intel-gfx] [PATCH 3/4] drm/i915/bdw: Pin the
On Thu, Oct 30, 2014 at 06:40:53PM +, john.c.harri...@intel.com wrote:
From: John Harrison john.c.harri...@intel.com
An earlier commit (c8725f3dc0911d4354315a65150aecd8b7d0d74a: Do not call
retire_requests from wait_for_rendering) removed the use of the ring parameter
within
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