On 09/03/2017 20:55, Chris Wilson wrote:
On Thu, Mar 09, 2017 at 04:47:52PM -, Patchwork wrote:
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/guc: Fix request re-submission
after reset
URL : https://patchwork.freedesktop.org/series/20991/
State : success
==
From: Tvrtko Ursulin
In commit 003342a50021 ("drm/i915: Keep track of active
forcewake domains in a bitmask") I forgot to adjust the
newly introduce fw_domains_active state across reset.
This caused the assert_forcewakes_inactive to trigger
during suspend and resume if
On Wed, Feb 22, 2017 at 10:23:18AM +0200, Jani Nikula wrote:
>
> [Your MUA messed up the quoting, FTFY below.]
>
> On Wed, 22 Feb 2017, "Navare, Manasi D" wrote:
> > > On Fri, 17 Feb 2017, Manasi Navare wrote:
> > >> Display stream
== Series Details ==
Series: drm/i915: Fix vGPU balloon for ggtt guard page (rev2)
URL : https://patchwork.freedesktop.org/series/20983/
State : success
== Summary ==
Series 20983v2 drm/i915: Fix vGPU balloon for ggtt guard page
From commit a6508ded2a66 ("drm/i915: Use page coloring to provide the guard
page at the end of the GTT"), we no longer explicitly subtract guard page
at end for GGTT address space init, so shouldn't subtract that for vGPU
balloon too, as that will leave that end page to be available for
vGPU.
== Series Details ==
Series: drm/i915: Wait for reset to complete before returning from
debugfs/i915_wedged
URL : https://patchwork.freedesktop.org/series/21030/
State : success
== Summary ==
Series 21030v1 drm/i915: Wait for reset to complete before returning from
debugfs/i915_wedged
Provide some serialisation between user operations by waiting for the
reset initiated by setting i915_wedged to complete.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_debugfs.c | 4
1 file changed, 4 insertions(+)
diff --git
On Fri, Mar 10, 2017 at 12:41:30AM +, Emil Velikov wrote:
> On 9 March 2017 at 22:46, Chris Wilson wrote:
> > ./include/drm/drm_pci.h:76:64: warning: ‘struct platform_device’ declared
> > inside parameter list will not be visible outside of this definition or
> >
== Series Details ==
Series: drm/i915: Move whole object to CPU domain for coherent shmem access
URL : https://patchwork.freedesktop.org/series/21020/
State : failure
== Summary ==
Series 21020v1 drm/i915: Move whole object to CPU domain for coherent shmem
access
On 9 March 2017 at 22:46, Chris Wilson wrote:
> ./include/drm/drm_pci.h:76:64: warning: ‘struct platform_device’ declared
> inside parameter list will not be visible outside of this definition or
> declaration
> extern int drm_platform_init(struct drm_driver *driver,
If the object is coherent, we can simply update the cache domain on the
whole object rather than calculate the before/after clflushes. The
advantage is that we then get correct tracking of ellided flushes when
changing coherency later.
Testcase: igt/gem_pwrite_snooped
Signed-off-by: Chris Wilson
Hi all,
After merging the drm-misc tree, today's linux-next build (arm
multi_v7_defconfig) produced this warning:
In file included from drivers/gpu/drm/drm_pci.c:29:0:
include/drm/drm_pci.h:76:64: warning: 'struct platform_device' declared inside
parameter list
extern int
== Series Details ==
Series: drm: Forward declare struct platform_device
URL : https://patchwork.freedesktop.org/series/21017/
State : success
== Summary ==
Series 21017v1 drm: Forward declare struct platform_device
https://patchwork.freedesktop.org/api/1.0/series/21017/revisions/1/mbox/
./include/drm/drm_pci.h:76:64: warning: ‘struct platform_device’ declared
inside parameter list will not be visible outside of this definition or
declaration
extern int drm_platform_init(struct drm_driver *driver, struct platform_device
*platform_device);
Fixes: 23ef59ef6dcc ("drm: Extract
== Series Details ==
Series: series starting with [v3] drm/i915: Stop using RP_DOWN_EI on Baytrail
(rev2)
URL : https://patchwork.freedesktop.org/series/20314/
State : success
== Summary ==
Series 20314v2 Series without cover letter
On 03/09/2017 12:54 PM, Chris Wilson wrote:
On Thu, Mar 09, 2017 at 05:02:16PM +, Tvrtko Ursulin wrote:
On 09/03/2017 08:55, Oscar Mateo wrote:
On 03/09/2017 08:50 AM, Tvrtko Ursulin wrote:
On 09/03/2017 08:42, Oscar Mateo wrote:
On 03/09/2017 02:05 AM, Tvrtko Ursulin wrote:
From:
On Thu, Mar 09, 2017 at 04:27:29PM +0200, Ville Syrjälä wrote:
> On Thu, Mar 09, 2017 at 02:20:49PM +, Chris Wilson wrote:
> > There is no easily digestible single self-refresh status bit, so don't
> > report one for debugfs/i915_sr_status.
> >
> > Signed-off-by: Chris Wilson
On Thu, Mar 09, 2017 at 05:44:34PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Use I915_{READ,WRITE}_FW() for updating the DSPARB registers on
> VLV/CHV. This is less expesive as we can grab the uncore.lock across
> the entire sequence of
Reviewed-by: Robert Foss
On 2017-03-08 08:30 AM, Tomeu Vizoso wrote:
Some frame sources such as sinks aren't able to provide meaningful frame
numbers, so in those cases just skip the TEST_SEQUENCE tests.
Signed-off-by: Tomeu Vizoso
---
Agree that your suggestion is better. I will drop this patch in the
next version of the set.
Thanks
On Thu, Mar 9, 2017 at 2:40 AM, Jani Nikula wrote:
> On Wed, 08 Mar 2017, Puthikorn Voravootivat wrote:
>> TCON tend to have better brightness
I think that there won't be a good way to determine which way of
adjusting backlight
is preferred when the panel support both PWM pin and DPCD.
How about extending the current i915_params.enable_dpcd_backlight to this.
{ 0:disable(default) 1: prefer PWM pin, 2: prefer DPCD }
If it is 1), use the
Currently, we sum the render and media cycles (on different engines) to
compute a percentage - but we fail to factor in the duplication into the
threshold calculations. This makes us very eager to upclock!
If we just consider the maximum busy cycles of either counter, we should
have an accurate
To make our adjustments to RPS requires taking a mutex and potentially
sleeping for an unknown duration - until we have completed our
adjustments further RPS interrupts are immaterial (they are based on
stale thresholds) and we can safely ignore them.
Signed-off-by: Chris Wilson
On Baytrail, we manually calculate busyness over the evaluation interval
to avoid issues with miscaluations with RC6 enabled. However, it turns
out that the DOWN_EI interrupt generator is completely bust - it
operates in two modes, continuous or never. Neither of which are
conducive to good
On Thu, Mar 09, 2017 at 03:52:50PM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> In commit 003342a50021 ("drm/i915: Keep track of active
> forcewake domains in a bitmask") I forgot to adjust the
> newly introduce fw_domains_active state across reset.
>
> This
On Thu, Mar 09, 2017 at 09:03:12PM +, Chris Wilson wrote:
> On Baytrail, we manually calculate busyness over the evaluation interval
> to avoid issues with miscaluations with RC6 enabled. However, it turns
> out that the DOWN_EI interrupt generator is completely bust - it
> operates in two
I've only found a very minor nitpick in intel_watermark.c,
other than that this patch does not apply cleanly on upstream/master,
so I've run no compilation or runtime tests.
When it applies to trunk, feel free to add my r-b.
On 2017-03-08 08:29 AM, Tomeu Vizoso wrote:
> When opening a DRM
On Baytrail, we manually calculate busyness over the evaluation interval
to avoid issues with miscaluations with RC6 enabled. However, it turns
out that the DOWN_EI interrupt generator is completely bust - it
operates in two modes, continuous or never. Neither of which are
conducive to good
On Thu, Mar 09, 2017 at 04:47:52PM -, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [CI,1/2] drm/i915/guc: Fix request re-submission
> after reset
> URL : https://patchwork.freedesktop.org/series/20991/
> State : success
>
> == Summary ==
>
> Series 20991v1
On Thu, Mar 09, 2017 at 05:02:16PM +, Tvrtko Ursulin wrote:
>
> On 09/03/2017 08:55, Oscar Mateo wrote:
> >On 03/09/2017 08:50 AM, Tvrtko Ursulin wrote:
> >>
> >>On 09/03/2017 08:42, Oscar Mateo wrote:
> >>>On 03/09/2017 02:05 AM, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
On Thu, Mar 09, 2017 at 07:23:14PM -, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Fix forcewake active domain tracking
> URL : https://patchwork.freedesktop.org/series/21004/
> State : failure
>
> == Summary ==
>
> Series 21004v1 drm/i915: Fix forcewake active domain
== Series Details ==
Series: drm/i915: Optimize plane updates a bit
URL : https://patchwork.freedesktop.org/series/21002/
State : failure
== Summary ==
Series 21002v1 drm/i915: Optimize plane updates a bit
https://patchwork.freedesktop.org/api/1.0/series/21002/revisions/1/mbox/
Test
== Series Details ==
Series: drm/i915: Fix forcewake active domain tracking
URL : https://patchwork.freedesktop.org/series/21004/
State : failure
== Summary ==
Series 21004v1 drm/i915: Fix forcewake active domain tracking
== Series Details ==
Series: drm/i915: Optimize plane updates a bit
URL : https://patchwork.freedesktop.org/series/21002/
State : failure
== Summary ==
Series 21002v1 drm/i915: Optimize plane updates a bit
https://patchwork.freedesktop.org/api/1.0/series/21002/revisions/1/mbox/
Test
On Thu, Mar 09, 2017 at 03:52:00PM +0100, Maarten Lankhorst wrote:
> Some small patchset to deal with the atomic iterator changes.
>
> Maarten Lankhorst (5):
> drm/i915: Use new atomic iterator macros in ddi
> drm/i915: Use new atomic iterator macros in fbc
> drm/i915: Use new atomic
== Series Details ==
Series: drm/i915: Use new atomic iterator macros.
URL : https://patchwork.freedesktop.org/series/20998/
State : success
== Summary ==
Series 20998v1 drm/i915: Use new atomic iterator macros.
https://patchwork.freedesktop.org/api/1.0/series/20998/revisions/1/mbox/
Test
tree: git://anongit.freedesktop.org/drm-intel drm-intel-nightly
head: 510c200742ced5a91d07e48220b669a3c9b30c0c
commit: 23ef59ef6dcc9b62bf077490a74df93b3bb0d530 [777/788] drm: Extract
drm_pci.h
config: tile-tilegx_defconfig (attached as .config)
compiler: tilegx-linux-gcc (GCC) 4.6.2
On Tue, Mar 07, 2017 at 07:36:45PM +0200, Jani Nikula wrote:
> On Fri, 03 Mar 2017, Ville Syrjälä wrote:
> > On Fri, Mar 03, 2017 at 05:01:42AM -0800, Manasi Navare wrote:
> >> If during VBT parsing we find that the port is unused,
> >> the driver code just bails
== Series Details ==
Series: drm/i915: Ignore skl+ for debugfs/i915_sr_status
URL : https://patchwork.freedesktop.org/series/20995/
State : success
== Summary ==
Series 20995v1 drm/i915: Ignore skl+ for debugfs/i915_sr_status
On Thu, Mar 09, 2017 at 02:06:15PM +0100, Maarten Lankhorst wrote:
> As a proof of concept, first try to convert intel_tv, which is a rarely
> used connector. It has 5 properties, tv format and 4 margins.
Since it's so rare, if you want someone to actually test the code
it'll probably make sense
== Series Details ==
Series: drm/i915: Remove intel_ prefix from encoder variables in intel_ddi.c
URL : https://patchwork.freedesktop.org/series/20992/
State : success
== Summary ==
Series 20992v1 drm/i915: Remove intel_ prefix from encoder variables in
intel_ddi.c
On 09/03/2017 08:55, Oscar Mateo wrote:
On 03/09/2017 08:50 AM, Tvrtko Ursulin wrote:
On 09/03/2017 08:42, Oscar Mateo wrote:
On 03/09/2017 02:05 AM, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
In order to ensure no missed interrupts we must first re-direct
the
On 03/09/2017 08:50 AM, Tvrtko Ursulin wrote:
On 09/03/2017 08:42, Oscar Mateo wrote:
On 03/09/2017 02:05 AM, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
In order to ensure no missed interrupts we must first re-direct
the interrupts to GuC, and only then re-submit
On 09/03/2017 08:42, Oscar Mateo wrote:
On 03/09/2017 02:05 AM, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
In order to ensure no missed interrupts we must first re-direct
the interrupts to GuC, and only then re-submit the requests to
be replayed after a GPU reset.
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/guc: Fix request re-submission
after reset
URL : https://patchwork.freedesktop.org/series/20991/
State : success
== Summary ==
Series 20991v1 Series without cover letter
On 03/09/2017 02:05 AM, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
In order to ensure no missed interrupts we must first re-direct
the interrupts to GuC, and only then re-submit the requests to
be replayed after a GPU reset. Otherwise context switch can fire
before
== Series Details ==
Series: drm/i915: Convert tv/dp_mst and crt connector properties to atomic.
URL : https://patchwork.freedesktop.org/series/20990/
State : success
== Summary ==
Series 20990v1 drm/i915: Convert tv/dp_mst and crt connector properties to
atomic.
On Thu, Mar 09, 2017 at 04:56:23PM +0100, Maarten Lankhorst wrote:
> Hey,
>
> Op 09-03-17 om 16:44 schreef ville.syrj...@linux.intel.com:
> > From: Ville Syrjälä
> >
> > Now that commit e1edbd44e23b ("drm/i915: Complain if we take too
> > long under vblank
tree: git://anongit.freedesktop.org/drm/drm-tip drm-tip
head: 510c200742ced5a91d07e48220b669a3c9b30c0c
commit: 23ef59ef6dcc9b62bf077490a74df93b3bb0d530 [777/788] drm: Extract
drm_pci.h
config: i386-randconfig-x070-201710 (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
Hey,
Op 09-03-17 om 16:44 schreef ville.syrj...@linux.intel.com:
> From: Ville Syrjälä
>
> Now that commit e1edbd44e23b ("drm/i915: Complain if we take too
> long under vblank evasion.") has expose just how badly we suck,
> it seems like a good time to optimize
From: Tvrtko Ursulin
In commit 003342a50021 ("drm/i915: Keep track of active
forcewake domains in a bitmask") I forgot to adjust the
newly introduce fw_domains_active state across reset.
This caused the assert_forcewakes_inactive to trigger
during suspend and resume if
+ intel-gfx
+ dri-devl
(missed in in-reply-to)
Regards
Shashank
-Original Message-
From: Sharma, Shashank
Sent: Thursday, March 9, 2017 6:02 PM
To: ville.syrj...@linux.intel.com; conselv...@gmail.com
Cc: Sharma, Shashank
Subject: [PATCH v9] drm/i915: enable
On Thu, Mar 09, 2017 at 05:24:14PM +0200, Mika Kuoppala wrote:
> Chris Wilson writes:
>
> > On Baytrail, we manually calculate busyness over the evaluation interval
> > to avoid issues with miscaluations with RC6 enabled. However, it turns
> > out that the DOWN_EI
From: Ville Syrjälä
Use I915_{READ,WRITE}_FW() for updating the DSPARB registers on
VLV/CHV. This is less expesive as we can grab the uncore.lock across
the entire sequence of reads and writes instead of each register
access grabbing it.
This also allows us to
From: Ville Syrjälä
Pull all the plane register writes closer together to avoid having
a lot of unrelated stuff in between them. This will make things more
clear once we'll grab the uncore lock around the entire bunch. Also
in the future we might even consider
From: Ville Syrjälä
Optimize the plane register accesses a little bit by grabbing
the uncore lock manually across the entire pile of accesses and
using I915_READ_FW().
This helps keep the pipe update vblank evade critical section
below our 100 usec deadline,
From: Ville Syrjälä
Replace __raw_i915_read32() with I915_READ_FW() in the workaround for
the SKL+ scanline counter hardware fail. The two are the same thing
but everyone else uses I915_READ_FW() so let's follow suit.
Signed-off-by: Ville Syrjälä
From: Ville Syrjälä
Optimize the multi-register read in i915_get_vblank_counter() a little
bit by grabbing the uncore lock manually and using I915_READ_FW().
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_irq.c | 11
From: Ville Syrjälä
Now that commit e1edbd44e23b ("drm/i915: Complain if we take too
long under vblank evasion.") has expose just how badly we suck,
it seems like a good time to optimize things a little bit.
Prior to this one of my VLV machines exceed the 100 usec
Chris Wilson writes:
> On Baytrail, we manually calculate busyness over the evaluation interval
> to avoid issues with miscaluations with RC6 enabled. However, it turns
> out that the DOWN_EI interrupt generator is completely bust - it
> operates in two modes,
== Series Details ==
Series: drm/i915: make context status notifier head be per engine (rev2)
URL : https://patchwork.freedesktop.org/series/20552/
State : success
== Summary ==
Series 20552v2 drm/i915: make context status notifier head be per engine
Sure, Thanks for this information.
Will give this a try.
Regards
Shashank
-Original Message-
From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
Sent: Thursday, March 9, 2017 5:04 PM
To: Sharma, Shashank
Cc: Conselvan De Oliveira, Ander
The GVT-g needs execlists to be enabled otherwise gvt should be
disabled. Add a check for enable_execlists before enabling gvt.
v2: use DRM_INFO in response to the user action
Signed-off-by: Chuanxiao Dong
---
drivers/gpu/drm/i915/intel_gvt.c | 5 +
1 file
On Thu, Mar 09, 2017 at 04:28:20PM +0530, Shashank Sharma wrote:
> In I915 driver, there are many places where variable name for
> intel_encoder object is given as 'intel_encoder' whereas it would
> make more sense in many places to call it just 'encoder'.
>
> This patch does a similar cleanup in
Use for_each_new_connector_in_state instead of for_each_connector_in_state.
Also make the function static, it's only used inside intel_ddi.c
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_ddi.c | 4 ++--
drivers/gpu/drm/i915/intel_drv.h | 2 --
== Series Details ==
Series: drm/i915: cleanup patch for intel_ddi.c
URL : https://patchwork.freedesktop.org/series/20984/
State : success
== Summary ==
Series 20984v1 drm/i915: cleanup patch for intel_ddi.c
https://patchwork.freedesktop.org/api/1.0/series/20984/revisions/1/mbox/
Test
Calculating the max pixel rate requires the new state, so use it there.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_cdclk.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_cdclk.c
Add a big fat warning in __intel_display_resume that the old state is
invalid, and use the correct state everywhere.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 161 ++-
1 file changed, 82
The watermark code needs to look at the new allocations, so use
for_each_new_crtc_in_state everywhere.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_pm.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git
Some small patchset to deal with the atomic iterator changes.
Maarten Lankhorst (5):
drm/i915: Use new atomic iterator macros in ddi
drm/i915: Use new atomic iterator macros in fbc
drm/i915: Use new atomic iterator macros in wm code
drm/i915: Use new atomic iterator macros in display code
Use for_each_new_plane_in_state, only the new state is needed.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_fbc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_fbc.c
> -Original Message-
> From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
> Sent: Thursday, March 9, 2017 9:48 PM
> To: Chris Wilson; Dong, Chuanxiao
> Cc: intel-gfx@lists.freedesktop.org; intel-gvt-...@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/gvt: add
On Thu, Mar 09, 2017 at 02:20:49PM +, Chris Wilson wrote:
> There is no easily digestible single self-refresh status bit, so don't
> report one for debugfs/i915_sr_status.
>
> Signed-off-by: Chris Wilson
> Cc: Ville Syrjälä
== Series Details ==
Series: drm/i915: Fix vGPU balloon for ggtt guard page
URL : https://patchwork.freedesktop.org/series/20983/
State : failure
== Summary ==
Series 20983v1 drm/i915: Fix vGPU balloon for ggtt guard page
There is no easily digestible single self-refresh status bit, so don't
report one for debugfs/i915_sr_status.
Signed-off-by: Chris Wilson
Cc: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_debugfs.c | 4 +++-
1 file changed, 3
On Thu, 09 Mar 2017, Chris Wilson wrote:
> On Thu, Mar 09, 2017 at 01:03:17PM +, Dong, Chuanxiao wrote:
>> The message printed is longer than 80 characters, and checkpatch tool also
>> complain with " quoted string split across lines" by splitting to multiple
>>
In I915 driver, there are many places where variable name for
intel_encoder object is given as 'intel_encoder' whereas it would
make more sense to call it just 'encoder' when possible.
This patch does this cleanup in file intel_ddi.c.
PS: There are few functions where both drm_encoder and
On Thu, Mar 09, 2017 at 01:03:17PM +, Dong, Chuanxiao wrote:
>
>
> > -Original Message-
> > From: intel-gvt-dev [mailto:intel-gvt-dev-boun...@lists.freedesktop.org] On
> > Behalf Of Chris Wilson
> > Sent: Thursday, March 9, 2017 8:45 PM
> > To: Dong, Chuanxiao
From: Chris Wilson
---
drivers/gpu/drm/i915/i915_params.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_params.c
b/drivers/gpu/drm/i915/i915_params.c
index 2e9645e6555a..8fa96edddf9f 100644
---
From: Tvrtko Ursulin
In order to ensure no missed interrupts we must first re-direct
the interrupts to GuC, and only then re-submit the requests to
be replayed after a GPU reset. Otherwise context switch can fire
before GuC has been set up to receive it triggering more
MST doesn't support setting any properties, but it should still
use the atomic helper for setting properties.
Only path and tile properties are supported (read-only), so keep
using the i915 helper for obtaining those properties.
Signed-off-by: Maarten Lankhorst
As a proof of concept, first try to convert intel_tv, which is a rarely
used connector. It has 5 properties, tv format and 4 margins.
I'm less certain about the state behavior itself, should we pass a size
parameter to intel_connector_alloc instead, so duplicate_state
can be done globally if it
No properties are supported, so just use the helper and reject
everything.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_crt.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_crt.c
intel_tv is a proof of concept conversion to discuss the API.
The other 2 connectors are straightforward.
Maarten Lankhorst (3):
drm/i915: Convert intel_tv connector properties to atomic.
drm/i915: Convert intel_dp_mst connector properties to atomic.
drm/i915: Convert intel_crt connector
> -Original Message-
> From: intel-gvt-dev [mailto:intel-gvt-dev-boun...@lists.freedesktop.org] On
> Behalf Of Chris Wilson
> Sent: Thursday, March 9, 2017 8:45 PM
> To: Dong, Chuanxiao
> Cc: intel-gfx@lists.freedesktop.org; intel-gvt-...@lists.freedesktop.org
== Series Details ==
Series: drm/i915: Restore engine->submit_request before unwedging
URL : https://patchwork.freedesktop.org/series/20982/
State : failure
== Summary ==
Series 20982v1 drm/i915: Restore engine->submit_request before unwedging
On Thu, Mar 09, 2017 at 12:32:18PM +, Dong, Chuanxiao wrote:
> Hi,
>
> Any comments to this patch?
>
> Thanks
> Chuanxiao
>
> > -Original Message-
> > From: intel-gvt-dev [mailto:intel-gvt-dev-boun...@lists.freedesktop.org] On
> > Behalf Of Chuanxiao Dong
> > Sent: Monday, March 6,
On Thu, Mar 09, 2017 at 12:06:37PM +, Chris Wilson wrote:
> On Thu, Mar 09, 2017 at 10:19:10AM +, Chris Wilson wrote:
> > On Thu, Mar 09, 2017 at 10:05:21AM +, Tvrtko Ursulin wrote:
> > > From: Tvrtko Ursulin
> > >
> > > In order to ensure no missed
On Tue, Mar 07, 2017 at 10:22:35AM +0530, Sagar Arun Kamble wrote:
> Driver needs to ensure that it doesn't mask the PM interrupts, which are
> unmasked/needed by GuC firmware. For that, Driver maintains a bitmask of
> interrupts to be kept unmasked, pm_intr_keep.
>
> pm_intr_keep was determined
On Thu, Mar 09, 2017 at 12:23:24PM -, Patchwork wrote:
> == Series Details ==
>
> Series: HAX enable guc submission for CI
> URL : https://patchwork.freedesktop.org/series/20981/
> State : failure
>
> == Summary ==
>
> Series 20981v1 HAX enable guc submission for CI
>
Hi,
Any comments to this patch?
Thanks
Chuanxiao
> -Original Message-
> From: intel-gvt-dev [mailto:intel-gvt-dev-boun...@lists.freedesktop.org] On
> Behalf Of Chuanxiao Dong
> Sent: Monday, March 6, 2017 1:16 PM
> To: intel-gfx@lists.freedesktop.org; intel-gvt-...@lists.freedesktop.org
== Series Details ==
Series: HAX enable guc submission for CI
URL : https://patchwork.freedesktop.org/series/20981/
State : failure
== Summary ==
Series 20981v1 HAX enable guc submission for CI
https://patchwork.freedesktop.org/api/1.0/series/20981/revisions/1/mbox/
Test gem_ctx_create:
On Thu, Mar 09, 2017 at 10:19:10AM +, Chris Wilson wrote:
> On Thu, Mar 09, 2017 at 10:05:21AM +, Tvrtko Ursulin wrote:
> > From: Tvrtko Ursulin
> >
> > In order to ensure no missed interrupts we must first re-direct
> > the interrupts to GuC, and only then
On Thu, Mar 09, 2017 at 11:54:31AM -, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [CI,1/2] drm/i915: Initialize pm_intr_keep
> during intel_irq_init for GuC
> URL : https://patchwork.freedesktop.org/series/20980/
> State : failure
>
> == Summary ==
>
> Series
On Wed, 2017-03-08 at 16:44 +0200, Petri Latvala wrote:
> Signed-off-by: Petri Latvala
Reviewed-by: Mika Kahola
> ---
> assembler/gen8_disasm.c | 5 -
> 1 file changed, 5 deletions(-)
>
> diff --git a/assembler/gen8_disasm.c
== Series Details ==
Series: series starting with [CI,1/2] drm/i915: Initialize pm_intr_keep during
intel_irq_init for GuC
URL : https://patchwork.freedesktop.org/series/20980/
State : failure
== Summary ==
Series 20980v1 Series without cover letter
Thanks Petri, agree with all your comments!
Thanks
Terrence
>-Original Message-
>From: Latvala, Petri
>Sent: Thursday, March 9, 2017 6:58 PM
>To: Xu, Terrence
>Cc: intel-gfx@lists.freedesktop.org; Jin, Gordon ;
>Sarvela,
>Tomi P
From: Changbin Du
GVTg has introduced the context status notifier to schedule the GVTg
workload. At that time, the notifier is bound to GVTg context only,
so GVTg is not aware of host workloads.
Now we are going to improve GVTg's guest workload scheduler policy,
and add
The summary should say what the clean up is about. For example:
drm/i915: Remove intel_ prefix from encoder variables in intel_ddi.c
With that fixed,
Reviewed-by: Ander Conselvan de Oliveira
On Thu, 2017-03-09 at 16:28 +0530, Shashank Sharma wrote:
> In I915 driver,
On Fri, Mar 10, 2017 at 03:34:49AM +0800, Terrence Xu wrote:
> GVT-g (Intel® Graphics Virtualization Technology) is a full GPU
> virtualization solution with mediated pass-through support.
>
> This tool is for create basic Linux guest based on KVMGT with
> VFIO framework, it including create
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