Re: [Intel-gfx] [GIT PULL] gvt fix for 4.14-rc5

Thanks! -Original Message- From: intel-gvt-dev [mailto:intel-gvt-dev-boun...@lists.freedesktop.org] On Behalf Of Rodrigo Vivi Sent: Tuesday, October 17, 2017 3:29 AM To: Wang, Zhi A Cc: Nikula, Jani ; intel-gfx@lists.freedesktop.org;

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with drm/atomic: Make atomic helper track newly assigned planes correctly, v2. (rev2)

== Series Details == Series: series starting with drm/atomic: Make atomic helper track newly assigned planes correctly, v2. (rev2) URL : https://patchwork.freedesktop.org/series/32044/ State : success == Summary == Series 32044v2 series starting with drm/atomic: Make atomic helper track

[Intel-gfx] [PATCH] drm/atomic: Make atomic helper track newly assigned planes correctly, v2.

Commit 669c9215afea ("drm/atomic: Make async plane update checks work as intended, v2.") forced planes to always be tracked, but forgot to explicitly get the crtc commit from the new crtc when available. This broke plane commit tracking, and caused kms_atomic_transitions to randomly fail with

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Print the condition causing GEM_BUG_ON

== Series Details == Series: drm/i915: Print the condition causing GEM_BUG_ON URL : https://patchwork.freedesktop.org/series/32050/ State : success == Summary == Test kms_setmode: Subgroup basic: pass -> FAIL (shard-hsw) fdo#99912 Test kms_flip:

Re: [Intel-gfx] [PATCH 13/14] drm/i915: Add NV12 as supported format for sprite plane

> -Original Message- > From: Kristian Kristensen [mailto:hoegsb...@gmail.com] > Sent: Tuesday, October 17, 2017 4:05 AM > To: Srinivas, Vidya ; intel- > g...@lists.freedesktop.org > Cc: Srinivas, Vidya > Subject: Re: [Intel-gfx] [PATCH

[Intel-gfx] ✗ Fi.CI.IGT: warning for DDI buf trans cleanup

== Series Details == Series: DDI buf trans cleanup URL : https://patchwork.freedesktop.org/series/32049/ State : warning == Summary == Test kms_flip: Subgroup dpms-vs-vblank-race-interruptible: fail -> PASS (shard-hsw) fdo#103060 Test kms_plane:

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/4] lib: Extract helpers for determining submission method

== Series Details == Series: series starting with [v2,1/4] lib: Extract helpers for determining submission method URL : https://patchwork.freedesktop.org/series/32020/ State : failure == Summary == Test kms_pipe_crc_basic: Subgroup read-crc-pipe-C-frame-sequence: pass

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with drm/i915/cnl: Add Cannonlake PCI IDs for another SKU. (rev2)

== Series Details == Series: series starting with drm/i915/cnl: Add Cannonlake PCI IDs for another SKU. (rev2) URL : https://patchwork.freedesktop.org/series/32069/ State : success == Summary == Series 32069v2 series starting with drm/i915/cnl: Add Cannonlake PCI IDs for another SKU.

[Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [1/2] drm/atomic: Make atomic helper track newly assigned planes correctly.

== Series Details == Series: series starting with [1/2] drm/atomic: Make atomic helper track newly assigned planes correctly. URL : https://patchwork.freedesktop.org/series/32044/ State : warning == Summary == Test kms_universal_plane: Subgroup universal-plane-pipe-B-functional:

Re: [Intel-gfx] [GIT PULL] gvt fix for 4.14-rc5

On Mon, Oct 16, 2017 at 05:12:42PM +, Zhi Wang wrote: > Hi: > > Here is a fix of one bug for 4.14-rc5 which fixes a GPU hang after resuing > one vGPU across different guest OSes. Applied to drm-intel-fixes. Thanks, Rodrigo. > > Thanks. > > --- > > The following changes since commit

[Intel-gfx] [PATCH] drm/i915/cnl: Add Cannonlake PCI IDs for another SKU.

By the Spec all CNL skus are GT2. v2: Really include the PCI IDs to the picidlist[]; v3: Add the PCI Id for another SKU (Anusha). v4: Update IDs, really include to pciidlists again. v5: Unify all GT2 IDs. v6: Prefer INTEL_CNL_IDS for the union since it is already in use at

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Add -Wall -Wextra to our build, set warnings to full (rev2)

== Series Details == Series: drm/i915: Add -Wall -Wextra to our build, set warnings to full (rev2) URL : https://patchwork.freedesktop.org/series/32033/ State : success == Summary == Test prime_self_import: Subgroup export-vs-gem_close-race: pass -> FAIL

Re: [Intel-gfx] [PATCH 04/10] drm/i915: Pass the level to intel_prepare_hdmi_ddi_buffers()

On Mon, Oct 16, 2017 at 7:56 AM, Ville Syrjala wrote: > From: Ville Syrjälä > > The caller of intel_prepare_hdmi_ddi_buffers() alreday figured out the > level, so let's just pass it in instead if figuring it out again. > >

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/cnl: DDIA Lane capability bit not set in clone mode (rev2)

== Series Details == Series: drm/i915/cnl: DDIA Lane capability bit not set in clone mode (rev2) URL : https://patchwork.freedesktop.org/series/28204/ State : success == Summary == Series 28204v2 drm/i915/cnl: DDIA Lane capability bit not set in clone mode

Re: [Intel-gfx] [PATCH v2 03/10] drm/i915: Pass the encoder type explicitly to skl_set_iboost()

On Mon, Oct 16, 2017 at 7:56 AM, Ville Syrjala wrote: > From: Ville Syrjälä > > encoder->type isn't reliable for DP/HDMI encoders, so pass the type > explicity to skl_set_iboost(). Also take the opportunity to streamline > the code. >

Re: [Intel-gfx] [PATCH 2/2] drm/i915/cnl: Fix PLL initialization for HDMI.

On Wed, Oct 04, 2017 at 07:34:27PM +, Ausmus, James wrote: > On Tue, Oct 3, 2017 at 3:08 PM, Rodrigo Vivi wrote: > > HDMI Mode selection on CNL is on CFGCR0 for that PLL, not > > on in a global CTRL1 as it was on SKL. > > > > The original patch addressed this

[Intel-gfx] [PATCH] drm/i915/cnl: DDIA Lane capability bit not set in clone mode

From: Clint Taylor DDIA Lane capability control 4 lane bit is not being set by firmware during clone mode boot. This occurs when multiple monitors are connected during boot. The driver will configure the port for 2 lane maximum width if this bit is not set. Cc: Mika

Re: [Intel-gfx] [PATCH 02/10] drm/i915: Extract intel_ddi_get_buf_trans_hdmi()

On Mon, Oct 16, 2017 at 7:56 AM, Ville Syrjala wrote: > From: Ville Syrjälä > > Introduce intel_ddi_get_buf_trans_hdmi() and start using it where we > can. > > Signed-off-by: Ville Syrjälä > --- >

Re: [Intel-gfx] [PATCH] drm/i915/cnl: WaRsUseTimeoutMode

On Mon, Oct 16, 2017 at 07:58:25PM +, Chris Wilson wrote: > Quoting Chris Wilson (2017-10-16 20:54:59) > > Quoting Rodrigo Vivi (2017-10-16 19:16:58) > > > On Mon, Oct 16, 2017 at 12:07:23PM +, David Weinehall wrote: > > > > On Tue, Aug 22, 2017 at 04:58:28PM -0700, Rodrigo Vivi wrote: > >

Re: [Intel-gfx] [PATCH v2 01/10] drm/i915: Relocate intel_ddi_get_buf_trans_*() functions

On Mon, Oct 16, 2017 at 7:56 AM, Ville Syrjala wrote: > From: Ville Syrjälä > > We'll want to use the intel_ddi_get_buf_trans_*() functions a bit > earlier in the file, so move them up. While at it start using them > in the iboost

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Handle drm-layer errors in intel_dp_add_mst_connector (rev6)

On Fri, Oct 13, 2017 at 8:35 PM, Patchwork wrote: > == Series Details == > > Series: drm/i915: Handle drm-layer errors in intel_dp_add_mst_connector (rev6) > URL : https://patchwork.freedesktop.org/series/30384/ > State : failure > > == Summary == > > Test

[Intel-gfx] [PATCH] drm/i915: Convert timers to use timer_setup()

In preparation for unconditionally passing the struct timer_list pointer to all timer callbacks, switch to using the new timer_setup() and from_timer() to pass the timer pointer explicitly. Cc: Daniel Vetter Cc: Jani Nikula Cc: David Airlie

Re: [Intel-gfx] [PATCH 13/14] drm/i915: Add NV12 as supported format for sprite plane

Vidya Srinivas writes: > From: Chandra Konduru > > This patch adds NV12 to list of supported formats for sprite plane. > > v2: Rebased (me) > > v3: Review comments by Ville addressed > - Removed skl_plane_formats_with_nv12 and added >

Re: [Intel-gfx] [PATCH 12/14] drm/i915: Add NV12 as supported format for primary plane

Vidya Srinivas writes: > From: Chandra Konduru > > This patch adds NV12 to list of supported formats for > primary plane > > v2: Rebased (Chandra Konduru) > > v3: Rebased (me) > > v4: Review comments by Ville addressed > Removed the

Re: [Intel-gfx] [PATCH 00/12] drm/i915: Fix up the CCS code

On Fri, Sep 1, 2017 at 6:46 AM, Ville Syrjälä wrote: > On Thu, Aug 31, 2017 at 05:05:01PM -0700, Rodrigo Vivi wrote: >> Hi Ville, >> >> On Wed, Aug 30, 2017 at 10:09 AM, Ville Syrjälä >> wrote: >> > On Wed, Aug 30, 2017 at 11:31:16AM

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Remove mostly duplicated video DIP handling from PSR code

== Series Details == Series: drm/i915: Remove mostly duplicated video DIP handling from PSR code URL : https://patchwork.freedesktop.org/series/31954/ State : success == Summary == Test kms_atomic_transition: Subgroup plane-all-transition-nonblocking: pass ->

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/9] drm/i915/cnl: Add Cannonlake PCI IDs for another SKU.

== Series Details == Series: series starting with [1/9] drm/i915/cnl: Add Cannonlake PCI IDs for another SKU. URL : https://patchwork.freedesktop.org/series/32069/ State : failure == Summary == CHK include/config/kernel.release CHK include/generated/uapi/linux/version.h CHK

[Intel-gfx] [PATCH 8/9] drm/i915/cnl: Add right GMBUS pin number for HDMI on Port F.

On CNP Pin 3 is for misc of Port F usage depending on the configuration. For CNL that uses Port F, pin 3 is the one. v2: Make it more generic and update commit message. Cc: Manasi Navare Signed-off-by: Rodrigo Vivi ---

[Intel-gfx] [PATCH 6/9] drm/i915/cnl: Enable DDI-F on Cannonlake.

Now let's finish the Port-F support by adding the proper port F detection, irq and power well support. v2: Rebase v3: Use BIT_ULL v4: Cover missed case on ddi init. v5: Update commit message. Cc: Manasi Navare Cc: Ville Syrjälä

[Intel-gfx] [PATCH 4/9] drm/i915/cnl: Fix _CNL_PORT_TX_DW2_LN0_F definition.

This was wrong since its introduction on commit '04416108ccea ("drm/i915/cnl: Add registers related to voltage swing sequences.")' But since no Port F was needed so far we don't need to propagate fixes back there. Cc: Manasi Navare Signed-off-by: Rodrigo Vivi

[Intel-gfx] [PATCH 9/9] drm/i915/cnl: Fix DP max rate for Cannonlake with port F.

On CNL SKUs that uses port F, max DP rate is 8.1G for all ports when we have the elevated voltage. v2: Make commit message more generic. Cc: Manasi Navare Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/intel_dp.c | 5 +++-- 1 file

[Intel-gfx] [PATCH 5/9] drm/i915: Fix DPLCLKA_CFGCR0 bits for Port F.

Since when it got introduced with commit '555e38d27317 ("drm/i915/cnl: DDI - PLL mapping")' the support for Port F was wrong, because Port F bits are far from bits used for A to E. Since Port F is not used so far we don't need to propagate Fixes back there. Cc: Manasi Navare

[Intel-gfx] [PATCH 7/9] drm/i915/cnl: Add HPD support for Port F.

On CNP boards that are using DDI F, bit 25 (SDE_PORTE_HOTPLUG_SPT) is representing the Digital Port F hotplug line when the Digital Port F hotplug detect input is enabled. v2: Reuse all existent structure instead of adding a new HPD_PORT_F pointing to pin of port E. v3: Use IS_CNL_WITH_PORT_F so

[Intel-gfx] [PATCH 1/9] drm/i915/cnl: Add Cannonlake PCI IDs for another SKU.

By the Spec all CNL skus are GT2. v2: Really include the PCI IDs to the picidlist[]; v3: Add the PCI Id for another SKU (Anusha). v4: Update IDs, really include to pciidlists again. v5: Unify all GT2 IDs. Signed-off-by: Anusha Srivatsa Signed-off-by: Rodrigo Vivi

[Intel-gfx] [PATCH 3/9] drm/i915/cnl: Add AUX-F support

On some Cannonlake SKUs we have a dedicated Aux for port F, that is only the full split between port A and port E. There is still no Aux E for Port E, as in previous platforms, because port_E still means shared lanes with port A. v2: Rebase. v3: Add couple missed PORT_F cases on intel_dp. v4:

[Intel-gfx] [PATCH 2/9] drm/i915/cnl: Add Port F definition.

Some Cannonlake SKUs will come with a full split between port A and port E. This will be called port F although it is not a 6th port, but only a split. v2: Fix size of dvo_ports found by Ander. v3: Adding missing cases from intel_bios.c for Port_F v4: Adding other missing cases and fix the commit

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Add -Wall -Wextra to our build, set warnings to full

== Series Details == Series: drm/i915: Add -Wall -Wextra to our build, set warnings to full URL : https://patchwork.freedesktop.org/series/32033/ State : success == Summary == Test kms_flip: Subgroup modeset-vs-vblank-race: fail -> PASS (shard-hsw)

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Report -EFAULT before pwrite fast path into shmemfs

== Series Details == Series: drm/i915: Report -EFAULT before pwrite fast path into shmemfs URL : https://patchwork.freedesktop.org/series/32066/ State : success == Summary == Series 32066v1 drm/i915: Report -EFAULT before pwrite fast path into shmemfs

[Intel-gfx] [PATCH] drm/i915: Report -EFAULT before pwrite fast path into shmemfs

When pwriting into shmemfs, the fast path pagecache_write does not notice when it is writing to beyond the end of the truncated shmemfs inode. Report -EFAULT directly when we try to use pwrite into the !I915_MADV_WILLNEED object. Fixes: 7c55e2c5772d ("drm/i915: Use pagecache write to prepopulate

Re: [Intel-gfx] [PATCH v2] drm/i915: Skip HW reinitialisation on resume if still wedged

Quoting Mika Kuoppala (2017-10-16 16:30:33) > Chris Wilson writes: > > > If we fail to recover the HW state upon resume (i.e. our attempt to > > clear the wedged bit and reset during i915_gem_sanitize() fails), then > > skip the HW restart inside i915_gem_init_hw(). We

Re: [Intel-gfx] [PATCH] drm/i915: Add in-flight request details to intel_engine_dump()

Quoting Jeff McGee (2017-10-16 17:10:20) > On Sun, Oct 15, 2017 at 09:43:10PM +0100, Chris Wilson wrote: > > In the intel_engine_cs dumper, we were showing the request details for > > the request queue but not of those requests already passed to the hw > > (just a summary of the seqno). If we show

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/9] drm/i915: Refactor testing obj->mm.pages (rev4)

== Series Details == Series: series starting with [1/9] drm/i915: Refactor testing obj->mm.pages (rev4) URL : https://patchwork.freedesktop.org/series/31959/ State : failure == Summary == Test kms_flip: Subgroup modeset-vs-vblank-race: fail -> PASS

Re: [Intel-gfx] [PATCH] drm/i915/cnl: WaRsUseTimeoutMode

Quoting Chris Wilson (2017-10-16 20:54:59) > Quoting Rodrigo Vivi (2017-10-16 19:16:58) > > On Mon, Oct 16, 2017 at 12:07:23PM +, David Weinehall wrote: > > > On Tue, Aug 22, 2017 at 04:58:28PM -0700, Rodrigo Vivi wrote: > > > > Apparently RC6 residency is lower than expected > > > > with EI

Re: [Intel-gfx] [PATCH] drm/i915/cnl: WaRsUseTimeoutMode

Quoting Rodrigo Vivi (2017-10-16 19:16:58) > On Mon, Oct 16, 2017 at 12:07:23PM +, David Weinehall wrote: > > On Tue, Aug 22, 2017 at 04:58:28PM -0700, Rodrigo Vivi wrote: > > > Apparently RC6 residency is lower than expected > > > with EI mode for most of the cases on CNL A0, B0 and C0. > > >

[Intel-gfx] ✓ Fi.CI.IGT: success for Documentation/i915: Add "User command execution" to doc-tree

== Series Details == Series: Documentation/i915: Add "User command execution" to doc-tree URL : https://patchwork.freedesktop.org/series/32025/ State : success == Summary == Test kms_frontbuffer_tracking: Subgroup fbc-1p-primscrn-spr-indfb-move: skip -> PASS

Re: [Intel-gfx] [PATCH v5] drm/i915: Replace *_reference/unreference() or *_ref/unref with _get/put()

On Mon, Oct 16, 2017 at 2:53 PM, Harsha Sharma wrote: > On Tue, Oct 17, 2017 at 12:15 AM, Sean Paul wrote: >> On Sat, Oct 14, 2017 at 2:36 PM, Harsha Sharma >> wrote: >>> Replace instances of

Re: [Intel-gfx] [PATCH] drm/i915/gvt: Clean up dead code in cmd_parser

On 16/10/17 12:08:19 +0300, Jani Nikula wrote: > On Sun, 15 Oct 2017, Christos Gkekas wrote: > > Delete variables 'gma_bottom' that are set but never used. > > Please use common sense in choosing the mailing lists and maintainers > you send patches to. In this case,

Re: [Intel-gfx] [PATCH v5] drm/i915: Replace *_reference/unreference() or *_ref/unref with _get/put()

On Tue, Oct 17, 2017 at 12:15 AM, Sean Paul wrote: > On Sat, Oct 14, 2017 at 2:36 PM, Harsha Sharma > wrote: >> Replace instances of drm_framebuffer_reference/unreference() with >> *_get/put() suffixes and drm_dev_unref with *_put() suffix >>

Re: [Intel-gfx] [PATCH v5] drm/i915: Replace *_reference/unreference() or *_ref/unref with _get/put()

On Sat, Oct 14, 2017 at 2:36 PM, Harsha Sharma wrote: > Replace instances of drm_framebuffer_reference/unreference() with > *_get/put() suffixes and drm_dev_unref with *_put() suffix > because get/put is shorter and consistent with the > kernel use of *_get/put

[Intel-gfx] [GIT PULL] gvt fix for 4.14-rc5

Hi: Here is a fix of one bug for 4.14-rc5 which fixes a GPU hang after resuing one vGPU across different guest OSes. Thanks. --- The following changes since commit ea850f64c2722278f150dc11de2141baeb24211c: drm/i915/bios: parse DDI ports also for CHV for HDMI DDC pin and DP AUX channel

Re: [Intel-gfx] [PATCH] drm/i915/cnl: WaRsUseTimeoutMode

On Mon, Oct 16, 2017 at 12:07:23PM +, David Weinehall wrote: > On Tue, Aug 22, 2017 at 04:58:28PM -0700, Rodrigo Vivi wrote: > > Apparently RC6 residency is lower than expected > > with EI mode for most of the cases on CNL A0, B0 and C0. > > > > This Wa doesn't solve our lower residency, but

Re: [Intel-gfx] [PATCH v6 1/3] drm/i915/guc : Unifying seq_puts messages for feature support

On 10/13/2017 02:05 AM, Sagar Arun Kamble wrote: Keep subject as "drm/i915" as this is generic change. Also I saw i915_runtime_pm_status debugfs output not updated. Could you please check. I did not change the seq_puts message of i915_runtime_pm_status debugfs since it doesn't fit into

[Intel-gfx] [GIT PULL] gvt fix for 4.14-rc5

Hi: Here is a fix of one bug for 4.14-rc5 which fixes a GPU hang after resuing one vGPU across different guest OSes. Thanks. --- The following changes since commit ea850f64c2722278f150dc11de2141baeb24211c: drm/i915/bios: parse DDI ports also for CHV for HDMI DDC pin and DP AUX channel

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gvt: Fix error handling bug in perform_bb_shadow

== Series Details == Series: drm/i915/gvt: Fix error handling bug in perform_bb_shadow URL : https://patchwork.freedesktop.org/series/32006/ State : success == Summary == shard-hswtotal:2553 pass:1441 dwarn:0 dfail:0 fail:9 skip:1103 time:9666s == Logs == For more details

Re: [Intel-gfx] [PATCH v6 2/3] drm/i915/guc : Removing i915_modparams.enable_guc_loading module parameter

On 10/13/2017 02:42 AM, Sagar Arun Kamble wrote: On 10/11/2017 12:02 AM, Sujaritha Sundaresan wrote: We currently have two module parameters that control GuC: "enable_guc_loading" and "enable_guc_submission". Whenever we need i915_modparams.enable_guc_submission=1, we also need

Re: [Intel-gfx] [PATCH v6 1/3] drm/i915/guc : Unifying seq_puts messages for feature support

On 10/13/2017 02:05 AM, Sagar Arun Kamble wrote: Keep subject as "drm/i915" as this is generic change. Also I saw i915_runtime_pm_status debugfs output not updated. Could you please check. I will change the subject and check the if the output is being updated. On 10/11/2017 12:02 AM,

[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/2] lib: Skip unsupported suspend-test modes

== Series Details == Series: series starting with [1/2] lib: Skip unsupported suspend-test modes URL : https://patchwork.freedesktop.org/series/32028/ State : warning == Summary == IGT patchset tested on top of latest successful build d4d976de7e022cb56a2dbfe96c4ab10549e24acc

Re: [Intel-gfx] [PATCH] drm/i915: Add in-flight request details to intel_engine_dump()

On Sun, Oct 15, 2017 at 09:43:10PM +0100, Chris Wilson wrote: > In the intel_engine_cs dumper, we were showing the request details for > the request queue but not of those requests already passed to the hw > (just a summary of the seqno). If we show those details, we can then > eliminate the

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gvt: Clean up dead code in cmd_parser

== Series Details == Series: drm/i915/gvt: Clean up dead code in cmd_parser URL : https://patchwork.freedesktop.org/series/32023/ State : failure == Summary == Test kms_color: Subgroup ctm-0-5-pipe3: skip -> INCOMPLETE (shard-hsw) Test kms_cursor_legacy:

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Firmware code reorg (rev5)

On Mon, 2017-10-16 at 15:23 +, Patchwork wrote: > == Series Details == > > Series: Firmware code reorg (rev5) > URL : https://patchwork.freedesktop.org/series/31846/ > State : failure GLK is broken as a baseline, not having GuC firmware. This is now merged, thanks for the patches and

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Print the condition causing GEM_BUG_ON

== Series Details == Series: drm/i915: Print the condition causing GEM_BUG_ON URL : https://patchwork.freedesktop.org/series/32050/ State : success == Summary == Series 32050v1 drm/i915: Print the condition causing GEM_BUG_ON

Re: [Intel-gfx] [PATCH 3/9] drm/i915: s/enum plane/enum old_plane_id/

On Fri, Oct 13, 2017 at 01:35:05PM +0300, Ville Syrjälä wrote: > On Thu, Oct 12, 2017 at 09:06:24PM +0200, Daniel Vetter wrote: > > On Wed, Oct 11, 2017 at 07:04:49PM +0300, Ville Syrjala wrote: > > > From: Ville Syrjälä > > > > > > Rename enum plane to enum

[Intel-gfx] ✓ Fi.CI.BAT: success for DDI buf trans cleanup

== Series Details == Series: DDI buf trans cleanup URL : https://patchwork.freedesktop.org/series/32049/ State : success == Summary == Series 32049v1 DDI buf trans cleanup https://patchwork.freedesktop.org/api/1.0/series/32049/revisions/1/mbox/ Test kms_cursor_legacy: Subgroup

Re: [Intel-gfx] [PATCH] drm/i915: Print the condition causing GEM_BUG_ON

On Mon, 2017-10-16 at 18:26 +0300, Mika Kuoppala wrote: > It is easier to categorize and debug bugs if the failed condition > is in plain sight in the actual dmesg output. Make it so. > > Cc: Chris Wilson > Cc: Joonas Lahtinen >

Re: [Intel-gfx] [PATCH 1/2] drm/atomic: Make atomic helper track newly assigned planes correctly.

On Mon, Oct 16, 2017 at 05:28:27PM +0200, Maarten Lankhorst wrote: > Op 16-10-17 om 16:48 schreef Ville Syrjälä: > > On Mon, Oct 16, 2017 at 03:59:38PM +0200, Maarten Lankhorst wrote: > >> Op 16-10-17 om 15:42 schreef Ville Syrjälä: > >>> On Mon, Oct 16, 2017 at 03:29:27PM +0200, Maarten Lankhorst

Re: [Intel-gfx] [PATCH 0/9] drm/i915: Plane assert/readout cleanups etc.

El 14/10/17 a las 01:45, Alex Villacis Lasso escribió: El 13/10/17 a las 11:28, Alex Villacís Lasso escribió: El 11/10/17 a las 11:38, Ville Syrjälä escribió: On Wed, Oct 11, 2017 at 04:21:58PM +, Alex Villacis Lasso wrote: El 11/10/17 a las 11:04, Ville Syrjala escribió: From: Ville

Re: [Intel-gfx] [PATCH v2] drm/i915: Skip HW reinitialisation on resume if still wedged

Chris Wilson writes: > If we fail to recover the HW state upon resume (i.e. our attempt to > clear the wedged bit and reset during i915_gem_sanitize() fails), then > skip the HW restart inside i915_gem_init_hw(). We will ultimately do the > HW restart when successfully

Re: [Intel-gfx] [PATCH] drm/i915: Skip HW reinitialisation on resume if still wedged

Chris Wilson writes: > If we fail to recover the HW state upon resume (i.e. our attempt to > clear the wedged bit and reset during i915_gem_sanitize() fails), then > skip the HW restart inside i915_gem_init_hw(). We will ultimate do the > the HW restart when sucessfully

Re: [Intel-gfx] [PATCH 1/2] drm/atomic: Make atomic helper track newly assigned planes correctly.

Op 16-10-17 om 16:48 schreef Ville Syrjälä: > On Mon, Oct 16, 2017 at 03:59:38PM +0200, Maarten Lankhorst wrote: >> Op 16-10-17 om 15:42 schreef Ville Syrjälä: >>> On Mon, Oct 16, 2017 at 03:29:27PM +0200, Maarten Lankhorst wrote: Commit 669c9215afea ("drm/atomic: Make async plane update

[Intel-gfx] [PATCH] drm/i915: Print the condition causing GEM_BUG_ON

It is easier to categorize and debug bugs if the failed condition is in plain sight in the actual dmesg output. Make it so. Cc: Chris Wilson Cc: Joonas Lahtinen Signed-off-by: Mika Kuoppala ---

[Intel-gfx] ✗ Fi.CI.BAT: failure for Firmware code reorg (rev5)

== Series Details == Series: Firmware code reorg (rev5) URL : https://patchwork.freedesktop.org/series/31846/ State : failure == Summary == Series 31846v5 Firmware code reorg https://patchwork.freedesktop.org/api/1.0/series/31846/revisions/5/mbox/ Test debugfs_test: Subgroup

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/4] lib: Extract helpers for determining submission method

== Series Details == Series: series starting with [v2,1/4] lib: Extract helpers for determining submission method URL : https://patchwork.freedesktop.org/series/32020/ State : success == Summary == IGT patchset tested on top of latest successful build d4d976de7e022cb56a2dbfe96c4ab10549e24acc

[Intel-gfx] [PATCH 07/10] drm/i915: Kill off the BXT buf_trans default_index

From: Ville Syrjälä default_index contained in the BXT buf_trans tables is actually useless. For DP we should always have a valid level selected (otherwise the link training logic would be buggy), and for HDMI we can just do what the other platforms do and pick the

[Intel-gfx] [PATCH 09/10] drm/i915: Unify error handling for missing DDI buf trans tables

From: Ville Syrjälä Handle missing buf trans tables, or out of bounds buf trans levels the same way everywhere. These should never be hit under normal conditions, but let's play it safe for now. Signed-off-by: Ville Syrjälä ---

[Intel-gfx] [PATCH 10/10] drm/i915: Drop the redundant hdmi prefix/suffix from a lot of variables

From: Ville Syrjälä A bunch of functions are now exclusively used for HDMI, so naming the variables with hdmi prefix/suffix is redundant. Also use int rather than u32 for the translation level consistently. Signed-off-by: Ville Syrjälä

[Intel-gfx] [PATCH v2 05/10] drm/i915: Integrate BXT into intel_ddi_dp_voltage_max()

From: Ville Syrjälä Make BXT less special by following the CNL approach and handling it in intel_ddi_dp_voltage_max() alognside every other DDI platform. v2: Clean up the argument types to bxt_ddi_vswing_sequence() while at it Signed-off-by: Ville Syrjälä

[Intel-gfx] [PATCH 08/10] drm/i915: Centralize the SKL DDI A/E vs. B/C/D buf trans handling

From: Ville Syrjälä SKL DDI B/C/D only have 9 usable buf trans registers for DP/eDP. That matches the normal DP buf trans tables, but the low vswing eDP tables have 10 entries. Thus the eDP tables can only be used safely with DDI A and E. We try to catch cases

[Intel-gfx] [PATCH v2 06/10] drm/i915: Pass encoder type to cnl_ddi_vswing_sequence() explicitly

From: Ville Syrjälä encoder->type is unreliable for DP/HDMI, so pass it in explicity into cnl_ddi_vswing_sequence(). This matches what we do for BXT. v2: Pass intel_encoder down to cnl_ddi_vswing_program(), and clean up the argument types while at it

[Intel-gfx] [PATCH 04/10] drm/i915: Pass the level to intel_prepare_hdmi_ddi_buffers()

From: Ville Syrjälä The caller of intel_prepare_hdmi_ddi_buffers() alreday figured out the level, so let's just pass it in instead if figuring it out again. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_ddi.c | 9

[Intel-gfx] [PATCH 02/10] drm/i915: Extract intel_ddi_get_buf_trans_hdmi()

From: Ville Syrjälä Introduce intel_ddi_get_buf_trans_hdmi() and start using it where we can. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_ddi.c | 50 ++-- 1 file changed, 28

[Intel-gfx] [PATCH v2 03/10] drm/i915: Pass the encoder type explicitly to skl_set_iboost()

From: Ville Syrjälä encoder->type isn't reliable for DP/HDMI encoders, so pass the type explicity to skl_set_iboost(). Also take the opportunity to streamline the code. v2: Clean up the argument types to skl_ddi_set_iboost() while at it Signed-off-by: Ville

[Intel-gfx] [PATCH 00/10] DDI buf trans cleanup

From: Ville Syrjälä Second batch of goodies extracted from the big DDI encoder->type series. This one tries to clean up a lot of the mess in DDI buf trans handling. The end result is DDI buf trans code that isn't reliant on encoder->type to tell DP vs. HDMI apart,

[Intel-gfx] [PATCH v2 01/10] drm/i915: Relocate intel_ddi_get_buf_trans_*() functions

From: Ville Syrjälä We'll want to use the intel_ddi_get_buf_trans_*() functions a bit earlier in the file, so move them up. While at it start using them in the iboost setup to get rid of the platform checks there. v2: Rebase due to BDW FDI buf trans fix

Re: [Intel-gfx] [PATCH 0/9] drm/i915: Plane assert/readout cleanups etc.

On Sat, 14 Oct 2017, Alex Villacis Lasso wrote: > El 13/10/17 a las 11:28, Alex Villacís Lasso escribió: >> El 11/10/17 a las 11:38, Ville Syrjälä escribió: >>> On Wed, Oct 11, 2017 at 04:21:58PM +, Alex Villacis Lasso wrote: El 11/10/17 a las 11:04, Ville

Re: [Intel-gfx] [PATCH 1/2] drm/atomic: Make atomic helper track newly assigned planes correctly.

On Mon, Oct 16, 2017 at 03:59:38PM +0200, Maarten Lankhorst wrote: > Op 16-10-17 om 15:42 schreef Ville Syrjälä: > > On Mon, Oct 16, 2017 at 03:29:27PM +0200, Maarten Lankhorst wrote: > >> Commit 669c9215afea ("drm/atomic: Make async plane update checks work as > >> intended, v2.") forced planes

[Intel-gfx] [CI v6 05/15] drm/i915/guc: Rename intel_guc_loader.c to intel_guc_fw.c

Remaining functions in intel_guc_loader.c were focused around GuC firmware. Rename them to match object-verb pattern and rename file itself. Suggested-by: Joonas Lahtinen Signed-off-by: Michal Wajdeczko Cc: Joonas Lahtinen

[Intel-gfx] [CI v6 13/15] drm/i915/guc: Update Guc messages on load failure

In case of GuC firmware loading failure we were reporting DRM_ERROR also for case when GuC loading was not strictly required. Signed-off-by: Michal Wajdeczko Cc: Chris Wilson Cc: Joonas Lahtinen Cc: Sagar

[Intel-gfx] [CI v6 01/15] drm/i915: Move intel_guc_wopcm_size to intel_guc.c

Function intel_guc_wopcm_size didn't fit well in the old place. With this move upcoming cleanup will be simpler. Suggested-by: Joonas Lahtinen Signed-off-by: Michal Wajdeczko Cc: Joonas Lahtinen Cc:

[Intel-gfx] [CI v6 10/15] drm/i915/uc: Add message with firmware url

In case of firmware fetch failure we should help user find latest firmware. URL macro duplication from csr.c will be fixed in upcoming patch. Suggested-by: Chris Wilson Signed-off-by: Michal Wajdeczko Cc: Chris Wilson

[Intel-gfx] [CI v6 12/15] drm/i915/uc: Unify firmware loading

Firmware loading for GuC and HuC are similar. Move common code into generic function for maximum reuse. v2: change message levels (Chris) Signed-off-by: Michal Wajdeczko Cc: Joonas Lahtinen Cc: Sagar Arun Kamble

[Intel-gfx] [CI v6 11/15] drm/i915: Update DMC firmware load error messages

Some of the error messages from DMC load were too generic and may be confusing for the user. Lets explicitly add DMC words there. Also as homepage of DMC firmware is same as for the GuC and Huc, lets reuse URL definition. Signed-off-by: Michal Wajdeczko Cc: Chris

[Intel-gfx] [CI v6 09/15] drm/i915/uc: Improve debug messages in firmware fetch

Time to remove less important info and make messages clear and consistent. v2: change some message levels (Chris) v3: restore DRM_WARN (Chris) Signed-off-by: Michal Wajdeczko Cc: Sagar Arun Kamble Cc: Joonas Lahtinen

[Intel-gfx] [CI v6 04/15] drm/i915/guc: Move doc near related definitions

After GuC code reorg some documentation was left in wrong place. Move it closer to corresponding definitions. v2: use consistent name for the GuC (Sagar) Signed-off-by: Michal Wajdeczko Cc: Joonas Lahtinen Cc: Sagar Arun Kamble

[Intel-gfx] [CI v6 15/15] HAX enable GuC submission for CI

Also revert ("drm/i915/guc: Assert that we switch between known ggtt->invalidate functions") Signed-off-by: Michal Wajdeczko --- drivers/gpu/drm/i915/i915_gem_gtt.c | 8 ++-- drivers/gpu/drm/i915/i915_params.h | 4 ++-- 2 files changed, 4 insertions(+), 8

[Intel-gfx] [CI v6 06/15] drm/i915/guc: Reorder functions in intel_guc_fw.c

Functions should be defined in their use order. Signed-off-by: Michal Wajdeczko Cc: Joonas Lahtinen Reviewed-by: Chris Wilson --- drivers/gpu/drm/i915/intel_guc_fw.c | 81

[Intel-gfx] [CI v6 14/15] drm/i915/huc: Move fw select function

No functional change. Just place the function closer to related definitions. Signed-off-by: Michal Wajdeczko Cc: Joonas Lahtinen Cc: Sagar Arun Kamble Reviewed-by: Chris Wilson ---

[Intel-gfx] [CI v6 00/15] Firmware code reorg

CC: Joonas Lahtinen Cc: Chris Wilson v1: was sent with wrong prefix "P v4" v2: apply review comments from Chris/Daniele v3: restore DRM_WARN, add firmware url v4: update DMC messages, drop CI HAX v5: common fw size check against WOPCM

[Intel-gfx] [CI v6 02/15] drm/i915/guc: Move GuC boot param initialization out of xfer

We want to keep ucode xfer functions separate from other initialization. Once separated, add explicit forcewake. v2: use BLITTER domain only and add comment (Daniele) Suggested-by: Joonas Lahtinen Signed-off-by: Michal Wajdeczko Cc:

[Intel-gfx] [CI v6 07/15] drm/i915/uc: Check all firmwares against WOPCM size

Both GuC and HuC firmwares will be moved into WOPCM so we can check ucode size early for both cases. Suggested-by: Joonas Lahtinen Signed-off-by: Michal Wajdeczko Cc: Sagar Arun Kamble Cc: Joonas Lahtinen

[Intel-gfx] [CI v6 08/15] drm/i915/guc: Pick better place for Guc final status message

GuC status message printed right after firmware upload may be too optimistic, as we may fail on subsequent steps. Move that message to the end of intel_uc_init_hw where we know the status for sure. v2: use dev_info (Chris) Signed-off-by: Michal Wajdeczko Cc: Joonas

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