[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Remove the priority "optimisation"

== Series Details == Series: drm/i915/execlists: Remove the priority "optimisation" URL : https://patchwork.freedesktop.org/series/32533/ State : success == Summary == Series 32533v1 drm/i915/execlists: Remove the priority "optimisation"

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: CNL DVFS thing (rev7)

== Series Details == Series: drm/i915: CNL DVFS thing (rev7) URL : https://patchwork.freedesktop.org/series/32247/ State : failure == Summary == Series 32247v7 drm/i915: CNL DVFS thing https://patchwork.freedesktop.org/api/1.0/series/32247/revisions/7/mbox/ Test kms_cursor_legacy:

Re: [Intel-gfx] drm/i915/gvt: Use common error handling code in shadow_workload_ring_buffer()

>> Add a jump target so that a call of the function "gvt_vgpu_err" is stored >> only once at the end of this function implementation. >> Replace two calls by goto statements. >> >> This issue was detected by using the Coccinelle software. > > I don't think this is an issue or an improvement. Do

[Intel-gfx] [PATCH] drm/i915: Dump watermark info in i915_display_info, v2.

Dumping watermark info will make it easier to debug whether the hardware watermarks match what's calculated for intermediate and optimal watermarks. This has made it easier to debug certain SNB underruns, so I've extended it from a hack to something that will print all atomic watermarks. Changes

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Dump watermark info in i915_display_info.

== Series Details == Series: drm/i915: Dump watermark info in i915_display_info. URL : https://patchwork.freedesktop.org/series/32532/ State : failure == Summary == CHK include/config/kernel.release CHK include/generated/uapi/linux/version.h CHK

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/1] drm/i915: Save PM interrupt register offsets in device info

== Series Details == Series: series starting with [v2,1/1] drm/i915: Save PM interrupt register offsets in device info URL : https://patchwork.freedesktop.org/series/32526/ State : success == Summary == Test kms_busy: Subgroup extended-modeset-hang-oldfb-with-reset-render-C:

Re: [Intel-gfx] [PATCH 2/3] drm/i915/guc: Always enable the breadcrumbs irq

On Fri, Oct 20, 2017 at 10:16:47PM +0100, Chris Wilson wrote: > Quoting Chris Wilson (2017-10-20 22:06:39) > > The execlists emulation on top of the GuC (used for scheduling and > > preemption) depends on the MI_USER_INTERRUPT for its notifications and > > tasklet action. As we always employ the

[Intel-gfx] [PATCH igt v2] igt/gem_ctx_isolation: Check isolation of registers between contexts

A new context assumes that all of its registers are in the default state when it is created. What may happen is that a register written by one context may leak into the second, causing mass confusion. Signed-off-by: Chris Wilson --- tests/Makefile.sources| 1 +

[Intel-gfx] [PATCH v2] drm-auth

--- drivers/gpu/drm/drm_auth.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_auth.c b/drivers/gpu/drm/drm_auth.c index 4c14b2cbc733..c40e603e0559 100644 --- a/drivers/gpu/drm/drm_auth.c +++ b/drivers/gpu/drm/drm_auth.c @@ -285,7 +285,8 @@ void

Re: [Intel-gfx] [PATCH] drm/i915/gvt: Use common error handling code in shadow_workload_ring_buffer()

On Tue, 24 Oct 2017, SF Markus Elfring wrote: > From: Markus Elfring > Date: Tue, 24 Oct 2017 14:20:06 +0200 > > Add a jump target so that a call of the function "gvt_vgpu_err" is stored > only once at the end of this function

Re: [Intel-gfx] [PATCH] drm/i915/cnl: Get RC6 working.

On Mon, Oct 23, 2017 at 03:46:12PM -0700, Rodrigo Vivi wrote: > On CNL, individual wake rate limit was added to each engine. > > GT can only go to RC6 if both Render and Media engines are > individually qualified. So we need to set their individual > wake rate limit. > >

Re: [Intel-gfx] [PATCH i-g-t] run-tests.sh: Use piglit names when listing available tests

On 24/10/17 15:18, Arkadiusz Hiler wrote: On Tue, Oct 24, 2017 at 01:40:21PM +0300, Petri Latvala wrote: List the available tests with piglit instead of by hand. This solves naming inconsistencies (piglit throwing caps away) as seen by cibuglog, and makes the listing code simpler. The format

Re: [Intel-gfx] [PATCH i-g-t] lib/igt_kms: Only print changed mode objects during atomic commit.

On Fri, Oct 20, 2017 at 03:23:57PM +0200, Maarten Lankhorst wrote: > When we only print mode objects that have changed properties, we > reduce a lot of the spam. Fortuantely we have a single bitfield > now that gets printed when something is changed. Use that to decrease > the amount of spam.

[Intel-gfx] [PATCH] drm/i915/gvt: Use common error handling code in shadow_workload_ring_buffer()

From: Markus Elfring Date: Tue, 24 Oct 2017 14:20:06 +0200 Add a jump target so that a call of the function "gvt_vgpu_err" is stored only once at the end of this function implementation. Replace two calls by goto statements. This issue was detected by using the

Re: [Intel-gfx] [PATCH i-g-t 1/2] meson: don't assume xmlrpc-c-config is there

On Tue, Oct 24, 2017 at 11:14:14AM +0300, Jani Nikula wrote: > xmlrpc is an optional dependency. If pkg-config can't find it, don't > assume xmlrpc-c-config will be there either. Make xmlrpc-c-config > optional too. > > Fixes error: > > Meson encountered an error in file meson.build, line 73,

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/huc: Use helper function while waiting for DMA completion

== Series Details == Series: drm/i915/huc: Use helper function while waiting for DMA completion URL : https://patchwork.freedesktop.org/series/32528/ State : failure == Summary == Series 32528v1 drm/i915/huc: Use helper function while waiting for DMA completion

Re: [Intel-gfx] [PATCH] drm/i915/execlists: Remove the priority "optimisation"

On Tue, Oct 24, 2017 at 12:55:01PM +0100, Chris Wilson wrote: > Originally we set the priority to max upon inserting the request into > the execlists queue (and removing it from the scheduler lists). We could > then use the prio==INT_MAX as a shortcut within execlists_schedule() to > detect the

Re: [Intel-gfx] [PATCH i-g-t] run-tests.sh: Use piglit names when listing available tests

On Tue, Oct 24, 2017 at 01:40:21PM +0300, Petri Latvala wrote: > List the available tests with piglit instead of by hand. This solves > naming inconsistencies (piglit throwing caps away) as seen by > cibuglog, and makes the listing code simpler. > > The format of the listing changes from > >

Re: [Intel-gfx] ✗ Fi.CI.BAT: warning for igt/kms_rotation_crc: Add horizontal flip subtest. (rev2)

On Fri, Oct 20, 2017 at 11:48:02PM +, Patchwork wrote: > == Series Details == > > Series: igt/kms_rotation_crc: Add horizontal flip subtest. (rev2) > URL : https://patchwork.freedesktop.org/series/31407/ > State : warning > > == Summary == > > IGT patchset tested on top of latest

Re: [Intel-gfx] [PATCH i-g-t] tests/kms_atomic_transition: Make tests pass

On Mon, Oct 23, 2017 at 12:15:34PM +0200, Maarten Lankhorst wrote: > Op 23-10-17 om 11:35 schreef Petri Latvala: > > > > > > On Fri, Oct 20, 2017 at 03:24:15PM +0200, Maarten Lankhorst wrote: > > > > Subject: [Intel-gfx] [PATCH i-g-t] tests/kms_atomic_transition: Make tests > > pass > > > > > >

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/1] drm/i915: Save PM interrupt register offsets in device info

== Series Details == Series: series starting with [v2,1/1] drm/i915: Save PM interrupt register offsets in device info URL : https://patchwork.freedesktop.org/series/32526/ State : success == Summary == Series 32526v1 series starting with [v2,1/1] drm/i915: Save PM interrupt register

[Intel-gfx] [PATCH] drm/i915/execlists: Remove the priority "optimisation"

Originally we set the priority to max upon inserting the request into the execlists queue (and removing it from the scheduler lists). We could then use the prio==INT_MAX as a shortcut within execlists_schedule() to detect the end of the dependency chain. Since commit 1f181225f8ec

[Intel-gfx] [PATCH] drm/i915: Dump watermark info in i915_display_info.

This will make it easier to debug whether the hardware watermarks match what's calculated for intermediate and optimal watermarks. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/i915_debugfs.c | 153 1 file

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/1] drm/i915: Save PM interrupt register offsets in device info

== Series Details == Series: series starting with [1/1] drm/i915: Save PM interrupt register offsets in device info URL : https://patchwork.freedesktop.org/series/32524/ State : failure == Summary == Series 32524v1 series starting with [1/1] drm/i915: Save PM interrupt register offsets in

Re: [Intel-gfx] [PATCH] drm/i915/huc: Use helper function while waiting for DMA completion

Quoting Michal Wajdeczko (2017-10-24 11:50:56) > Waiting for DMA status register can be done with dedicated function. > Lets use it as additional bonus will be smaller driver footprint. > > Signed-off-by: Michal Wajdeczko > Cc: Chris Wilson

Re: [Intel-gfx] [PATCH igt] igt/gem_ctx_isolation: Check isolation of registers between contexts

Quoting Chris Wilson (2017-10-24 12:07:58) > A new context assumes that all of its registers are in the default state > when it is created. What may happen is that a register written by one > context may leak into the second, causing mass confusion. > > Signed-off-by: Chris Wilson

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: CNL DVFS thing (rev7)

== Series Details == Series: drm/i915: CNL DVFS thing (rev7) URL : https://patchwork.freedesktop.org/series/32247/ State : failure == Summary == Series 32247v7 drm/i915: CNL DVFS thing https://patchwork.freedesktop.org/api/1.0/series/32247/revisions/7/mbox/ Test chamelium: Subgroup

Re: [Intel-gfx] [PATCH i-g-t] igt/lib: Ignoring subtest name case

On Tue, Oct 24, 2017 at 12:53:06PM +0200, Lukasz Fiedorowicz wrote: > Lists in intel-ci directory are kept in all lower case but the subtest > names are mix of lower and upper case. > Piglit is able to handle this but not every CI is using piglit. Changing > condition to ignore subtest names case.

[Intel-gfx] [PATCH igt] igt/gem_ctx_isolation: Check isolation of registers between contexts

A new context assumes that all of its registers are in the default state when it is created. What may happen is that a register written by one context may leak into the second, causing mass confusion. Signed-off-by: Chris Wilson --- tests/Makefile.sources| 1 +

[Intel-gfx] [PATCH i-g-t] igt/lib: Ignoring subtest name case

Lists in intel-ci directory are kept in all lower case but the subtest names are mix of lower and upper case. Piglit is able to handle this but not every CI is using piglit. Changing condition to ignore subtest names case. Signed-off-by: Lukasz Fiedorowicz ---

[Intel-gfx] [PATCH] drm/i915/huc: Use helper function while waiting for DMA completion

Waiting for DMA status register can be done with dedicated function. Lets use it as additional bonus will be smaller driver footprint. Signed-off-by: Michal Wajdeczko Cc: Chris Wilson Cc: Joonas Lahtinen ---

Re: [Intel-gfx] [PATCH v2 1/1] drm/i915: Save PM interrupt register offsets in device info

On Tue, 24 Oct 2017 12:41:13 +0200, Sagar Arun Kamble wrote: PM interrupt register offsets are constant per platforms and saving those in device info is more appropriate than getting those through functions. This patch removes functions gen6_pm_iir/imr/ier and saves

[Intel-gfx] [PATCH i-g-t] run-tests.sh: Use piglit names when listing available tests

List the available tests with piglit instead of by hand. This solves naming inconsistencies (piglit throwing caps away) as seen by cibuglog, and makes the listing code simpler. The format of the listing changes from test-binary/subtest-name to igt@test-binary@subtest-name but so far nothing

[Intel-gfx] [PATCH v2 1/1] drm/i915: Save PM interrupt register offsets in device info

PM interrupt register offsets are constant per platforms and saving those in device info is more appropriate than getting those through functions. This patch removes functions gen6_pm_iir/imr/ier and saves those offsets in device info. v2: Use INTEL_INFO() to access device info. (Chris)

Re: [Intel-gfx] [PATCH 1/1] drm/i915: Save PM interrupt register offsets in device info

Quoting Sagar Arun Kamble (2017-10-24 11:10:50) > PM interrupt register offsets are constant per platforms and saving those > in device info is more appropriate than getting those through functions. > This patch removes functions gen6_pm_iir/imr/ier and saves those offsets > in device info. > >

[Intel-gfx] [PATCH 1/1] drm/i915: Save PM interrupt register offsets in device info

PM interrupt register offsets are constant per platforms and saving those in device info is more appropriate than getting those through functions. This patch removes functions gen6_pm_iir/imr/ier and saves those offsets in device info. Suggested-by: Tvrtko Ursulin

Re: [Intel-gfx] [PATCH] drm/i915/cnl: Symmetric scalers for each pipe

On 10/11/2017 6:38 PM, Mika Kahola wrote: On Wed, 2017-10-11 at 15:43 +0300, Ville Syrjälä wrote: On Mon, Oct 09, 2017 at 03:26:07PM +0300, Mika Kahola wrote: For Cannonlake the number of scalers for each pipe is 2. Let's increase the number of scalers for pipe C. Signed-off-by: Mika Kahola

Re: [Intel-gfx] [PATCH v2 00/10] drm/i915: CNL DVFS thing

On Tue, Oct 24, 2017 at 12:52:06PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > New version of the CNL DVFS series. Everything from the previous series > (first 8 patches) are already reviewed. I slapped on two additional patches > that fell out from the

[Intel-gfx] [PATCH 10/10] drm/i915: Perform a central cdclk state sanity check

From: Ville Syrjälä WARN if the cdclk state doesn't match what we expect after programming. And let's remove the WARN from bdw_set_cdclk() that's trying to achieve the same thing in a more limite fashion. Also take the opportunity to refactor the code to use a

[Intel-gfx] [PATCH v2 05/10] drm/i915: Use cdclk_state->voltage on SKL/KBL/CFL

From: Ville Syrjälä Track the system agent voltage we request from pcode in the cdclk state on SKL/KBL/CFL. Annoyingly we can't actually read out the current value since there's no pcode command to do that, so we'll have to just assume that it worked. v2:

[Intel-gfx] [PATCH v2 07/10] drm/i915: Use cdclk_state->voltage on CNL

From: Ville Syrjälä Track the system agent voltage we request from pcode in the cdclk state on CNL. Annoyingly we can't actually read out the current value since there's no pcode command to do that, so we'll have to just assume that it worked. v2:

[Intel-gfx] [PATCH v4 08/10] drm/i915: Adjust system agent voltage on CNL if required by DDI ports

From: Ville Syrjälä On CNL we may need to bump up the system agent voltage not only due to CDCLK but also when driving DDI port with a sufficiently high clock. To that end start tracking the minimum acceptable voltage for each crtc. We do the tracking via crtcs

[Intel-gfx] [PATCH 09/10] drm/i915: Sanity check cdclk in vlv_set_cdclk()

From: Ville Syrjälä chv_set_cdclk() sanity checks that the cdclk frequency is one of the legal values. Do the same in the VLV function. Cc: Mika Kahola Cc: Manasi Navare Cc: Rodrigo Vivi

[Intel-gfx] [PATCH i-g-t 5/6] Makefile.meson: no need to have a separate default target

Just place "all" target at the top. Makefiles aren't ordered. Signed-off-by: Jani Nikula --- Makefile.meson | 10 -- 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/Makefile.meson b/Makefile.meson index 82fa50bf92e5..c7a87f37f47d 100644 ---

[Intel-gfx] [PATCH i-g-t 6/6] Makefile.meson: add distclean target to remove Makefile and build dir

Useful for forcing a clean meson build from scratch. Signed-off-by: Jani Nikula --- Makefile.meson | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Makefile.meson b/Makefile.meson index c7a87f37f47d..2e09c11052da 100644 --- a/Makefile.meson +++

[Intel-gfx] [PATCH v2 00/10] drm/i915: CNL DVFS thing

From: Ville Syrjälä New version of the CNL DVFS series. Everything from the previous series (first 8 patches) are already reviewed. I slapped on two additional patches that fell out from the review of the first series. Entire series available here:

[Intel-gfx] [PATCH 01/10] drm/i915: Clean up some cdclk switch statements

From: Ville Syrjälä Redo some switch statements in the cdclk code to use a common fall through for the default case. Makes everything look a bit more uniform Cc: Mika Kahola Cc: Manasi Navare Cc: Rodrigo Vivi

[Intel-gfx] [PATCH v3 04/10] drm/i915: Use cdclk_state->voltage on BDW

From: Ville Syrjälä Track the system agent voltage we request from pcode in the cdclk state on BDW. Annoyingly we can't actually read out the current value since there's no pcode command to do that, so we'll have to just assume that it worked. v2: Keep the WARN_ON

[Intel-gfx] [PATCH v2 06/10] drm/i915: Use cdclk_state->voltage on BXT/GLK

From: Ville Syrjälä Track the system agent voltage we request from pcode in the cdclk state on BXT/GLK. Annoyingly we can't actually read out the current value since there's no pcode command to do that, so we'll have to just assume that it worked. v2:

[Intel-gfx] [PATCH v4 03/10] drm/i915: Use cdclk_state->voltage on VLV/CHV

From: Ville Syrjälä Store the punit DSPFREQUAR value into cdclk_state->voltage on VLV/CHV. Since we can actually read that out from the hardware this can give us a bit more cross checking between the hardware and software state. v2: Don't break waiting for cdclk

[Intel-gfx] [PATCH i-g-t 4/6] Makefile.meson: fix .PHONY deps

Most targets here are phony, tell that to make. Avoid potentials collisions with files and directories with the same names. Signed-off-by: Jani Nikula --- Makefile.meson | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Makefile.meson b/Makefile.meson

[Intel-gfx] [PATCH v2 02/10] drm/i915: Start tracking voltage level in the cdclk state

From: Ville Syrjälä For CNL we'll need to start considering the port clocks when we select the voltage level for the system agent. To that end start tracking the voltage in the cdclk state (since that already has to adjust it). v2: s/voltage/voltage_level/

[Intel-gfx] [PATCH i-g-t 3/6] Makefile.meson: no need to mkdir build directory before running meson

Meson creates the directory for you. Signed-off-by: Jani Nikula --- Makefile.meson | 1 - 1 file changed, 1 deletion(-) diff --git a/Makefile.meson b/Makefile.meson index 6955e6a9a694..9f71cf341121 100644 --- a/Makefile.meson +++ b/Makefile.meson @@ -8,7 +8,6 @@

[Intel-gfx] [PATCH i-g-t 2/6] Makefile.meson: use $(error ...) for errors

This is the usual way of flagging fatal errors in Makefiles, and gives you the error exit code too. Signed-off-by: Jani Nikula --- Makefile.meson | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Makefile.meson b/Makefile.meson index

[Intel-gfx] [PATCH i-g-t 0/6] meson: makefile integration cleanup

I know the meson "makefile integration" is supposed to be just a simple helper, but add a touch of polish to it anyway. BR, Jani. Jani Nikula (6): meson: split out simple makefile integration into a makefile Makefile.meson: use $(error ...) for errors Makefile.meson: no need to mkdir build

[Intel-gfx] [PATCH i-g-t 1/6] meson: split out simple makefile integration into a makefile

A separate makefile is easier to read and maintain than a here document. The meson.sh shell script becomes trivial too. Signed-off-by: Jani Nikula --- Makefile.meson | 33 + meson.sh | 38 +++--- 2

Re: [Intel-gfx] [PATCH 2/4] drm/i915: Synchronize irq before parking each engine

Quoting Mika Kuoppala (2017-10-24 10:19:15) > Chris Wilson writes: > > > Quoting Chris Wilson (2017-10-23 22:32:35) > >> When we park the engine (upon idling), we kill the irq tasklet. However, > >> to be sure that it is not restarted by a final interrupt after doing

Re: [Intel-gfx] [PATCH] drm/i915/cnl: Force DDI_A_4_LANES when needed.

On Mon, Oct 23, 2017 at 10:39:20AM -0700, Rodrigo Vivi wrote: > As we faced in BXT, on CNL DDI_A_4_LANES is not > set as expected when system is boot with multiple > monitors connected. This result in wrong lane > setup impacting the max data rate available and > consequently blocking modeset on

Re: [Intel-gfx] [PATCH 2/4] drm/i915: Synchronize irq before parking each engine

Chris Wilson writes: > Quoting Chris Wilson (2017-10-23 22:32:35) >> When we park the engine (upon idling), we kill the irq tasklet. However, >> to be sure that it is not restarted by a final interrupt after doing so, >> flush the interrupt handler before parking. As we

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] meson: don't assume xmlrpc-c-config is there

== Series Details == Series: series starting with [1/2] meson: don't assume xmlrpc-c-config is there URL : https://patchwork.freedesktop.org/series/32511/ State : success == Summary == Test drv_module_reload: Subgroup basic-reload: pass -> DMESG-WARN (shard-hsw)

Re: [Intel-gfx] [PATCH 2/4] drm/i915: Synchronize irq before parking each engine

Quoting Chris Wilson (2017-10-23 22:32:35) > When we park the engine (upon idling), we kill the irq tasklet. However, > to be sure that it is not restarted by a final interrupt after doing so, > flush the interrupt handler before parking. As we only park the engines > when we believe the system is

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] meson: don't assume xmlrpc-c-config is there

== Series Details == Series: series starting with [1/2] meson: don't assume xmlrpc-c-config is there URL : https://patchwork.freedesktop.org/series/32511/ State : success == Summary == IGT patchset tested on top of latest successful build cdfe992134b478b76e0763773e9d4e82bba5b98f

[Intel-gfx] [PATCH i-g-t 2/2] meson: intel_dp_compliance depends on libudev

Only build intel_dp_compliance when libudev is available, also include libudev in the list of dependencies. Fixes error when libudev isn't there: ../tools/intel_dp_compliance_hotplug.c:33:21: fatal error: libudev.h: No such file or directory #include Signed-off-by: Jani Nikula

[Intel-gfx] [PATCH i-g-t 1/2] meson: don't assume xmlrpc-c-config is there

xmlrpc is an optional dependency. If pkg-config can't find it, don't assume xmlrpc-c-config will be there either. Make xmlrpc-c-config optional too. Fixes error: Meson encountered an error in file meson.build, line 73, column 1: Program or command 'xmlrpc-c-config' not foundor not executable

Re: [Intel-gfx] [PATCH 2/4] drm/i915: Synchronize irq before parking each engine

Quoting Chris Wilson (2017-10-23 22:32:35) > When we park the engine (upon idling), we kill the irq tasklet. However, > to be sure that it is not restarted by a final interrupt after doing so, > flush the interrupt handler before parking. As we only park the engines > when we believe the system is

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/fbdev: Panel orientation connector property support (rev2)

== Series Details == Series: drm/fbdev: Panel orientation connector property support (rev2) URL : https://patchwork.freedesktop.org/series/32447/ State : success == Summary == Test drv_module_reload: Subgroup basic-reload-inject: dmesg-warn -> PASS (shard-hsw)

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/fbdev: Panel orientation connector property support (rev2)

Hi, > -Original Message- > From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf > Of Saarinen, Jani > Sent: tiistai 24. lokakuuta 2017 9.14 > To: Hans de Goede ; intel- > g...@lists.freedesktop.org > Subject: Re: [Intel-gfx] ✗ Fi.CI.BAT:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/fbdev: Panel orientation connector property support (rev2)

== Series Details == Series: drm/fbdev: Panel orientation connector property support (rev2) URL : https://patchwork.freedesktop.org/series/32447/ State : success == Summary == Series 32447v2 drm/fbdev: Panel orientation connector property support

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/fbdev: Panel orientation connector property support (rev2)

Hi, > -Original Message- > From: Hans de Goede [mailto:j.w.r.dego...@gmail.com] > Sent: maanantai 23. lokakuuta 2017 17.59 > To: Saarinen, Jani ; intel- > g...@lists.freedesktop.org > Subject: Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/fbdev: Panel orientation >

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